~/Verilog/bin/topld.pl M660A
info: 1n3606 ne 1n4148do35_10
warning: making d1/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d2/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d3/1n3606/ a connector
info: 1n750a ne 4.7v
warning: making d4/1n750a/ a connector
info: 2n3009 ne 2n2219
warning: making q1/2n3009/ a connector
info: 2n3009 ne 2n2219
warning: making q2/2n3009/ a connector
info: 2n3009 ne 2n2219
warning: making q3/2n3009/ a connector
info: 2n3009 ne 2n2219
warning: making q4/2n3009/ a connector
info: 2n3009 ne 2n2219
warning: making q5/2n3009/ a connector
info: 2n3009 ne 2n2219
warning: making q6/2n3009/ a connector
info: edge_1 ne edge_con1
warning: making u$3/edge_1/ a connector
~/Verilog/bin/smaller.pl M660A.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M660AX.PLD || (rm M660AX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M660AX.PLD >vv || (rm vv; exit 1)
mv vv M660A.v
rm M660AX.PLD