// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: cpol_use 
// c17: c_us 
// c18: c_us 
// c19: c_us 
// c20: cpol_use 
// c21: cpol_use 
// c22: cpol_use 
// c23: c_us 
// c24: c_us 
// e1: sn7475 
module m7050x (n3va, n3vb, n_t_17x, n_t_30x, n_t_39x, ac1, at2, ba1, ba_lp_0_rp, ba_lp_1_rp, bb_lp_0_rp, bb_lp_1_rp, bc1, bn1, clk_l, clock1, enable_l, feed_hole, feed_switch, inhibit_strobe_l, initialize_l, int_request, iob_in_10, iob_in_11, iob_in_4, iob_in_5, iob_in_6, iob_in_7, iob_in_8, iob_in_9, iop1, iop2, iop4, iot_011, mb3_lp_0_rp, mb4_lp_0_rp, mb5_lp_0_rp, mb6_lp_0_rp, mb7_lp_0_rp, mb8_lp_1_rp, n5v_1, n5v_2, n_t_1x, n_t_21x, n_t_26x, n_t_29x, n_t_34x, n_t_37x, offline, out_of_tape, pwr, rd_hole_1, rd_hole_2, rd_hole_3, rd_hole_4, rd_hole_5, rd_hole_6, rd_hole_7, rd_hole_8, rdr_run_l, rfc_delayed_l, shift, shift_l, skip, stop_complete, stop_delay);
input n3va;
input n3vb;
input n_t_17x;
input n_t_30x;
input n_t_39x;
inout ac1;
inout at2;
inout ba1;
output ba_lp_0_rp;
output ba_lp_1_rp;
output bb_lp_0_rp;
output bb_lp_1_rp;
input bc1;
inout bn1;
input clk_l;
input clock1;
inout enable_l;
output feed_hole;
input feed_switch;
input inhibit_strobe_l;
input initialize_l;
output int_request;
output iob_in_10;
output iob_in_11;
output iob_in_4;
output iob_in_5;
output iob_in_6;
output iob_in_7;
output iob_in_8;
output iob_in_9;
input iop1;
input iop2;
input iop4;
inout iot_011;
input mb3_lp_0_rp;
input mb4_lp_0_rp;
input mb5_lp_0_rp;
input mb6_lp_0_rp;
input mb7_lp_0_rp;
input mb8_lp_1_rp;
output n5v_1;
output n5v_2;
output n_t_1x;
inout n_t_21x;
output n_t_26x;
output n_t_29x;
input n_t_34x;
output n_t_37x;
input offline;
output out_of_tape;
output pwr;
input rd_hole_1;
input rd_hole_2;
input rd_hole_3;
input rd_hole_4;
input rd_hole_5;
input rd_hole_6;
input rd_hole_7;
input rd_hole_8;
inout rdr_run_l;
inout rfc_delayed_l;
input shift;
input shift_l;
output skip;
input stop_complete;
input stop_delay;

reg ba_m;
reg bb_m;
reg enable_m;
reg n_t_10x_m;
reg n_t_11x_m;
reg n_t_12x_m;
reg n_t_13x_m;
reg n_t_14x_m;
reg n_t_27x_m;
reg n_t_2x_m;
reg n_t_3x_m;
reg n_t_9x_m;
reg rdr_flag_m;
reg rdr_run_m;

reg n_t_14x;
reg n_t_13x;
reg n_t_12x;
reg n_t_11x;
reg n_t_3x;
reg n_t_2x;
reg n_t_10x;
reg n_t_9x;
reg rdr_run;
reg rdr_flag;
reg n_t_27x;
reg enable;
reg bb;
reg ba;
wire bv2;
wire clr_flag;
wire clr_run_l;
wire iot_011_l;
wire iot_012_l;
wire iot_014_l;
wire n_t_16x;
wire n_t_24x;
wire n_t_25x;
wire n_t_28x;
wire n_t_40x;
wire n_t_41x;
wire n_t_5x;
wire out_of_tape_l;
always @(ac1, rd_hole_1, ac1, rd_hole_1, 1'b0)
  if (ac1 & ~rd_hole_1) begin
    n_t_14x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_1) begin
    n_t_14x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_14x_m <= 1'b0;
  end
always @(ac1, rd_hole_1, ac1, rd_hole_1, n_t_14x_m)
  if (ac1 & ~rd_hole_1) begin
    n_t_14x <= 1'b0;
  end else
  if (ac1 & rd_hole_1) begin
    n_t_14x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_14x <= n_t_14x_m;
  end
always @(ac1, rd_hole_2, ac1, rd_hole_2, 1'b0)
  if (ac1 & ~rd_hole_2) begin
    n_t_13x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_2) begin
    n_t_13x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_13x_m <= 1'b0;
  end
always @(ac1, rd_hole_2, ac1, rd_hole_2, n_t_13x_m)
  if (ac1 & ~rd_hole_2) begin
    n_t_13x <= 1'b0;
  end else
  if (ac1 & rd_hole_2) begin
    n_t_13x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_13x <= n_t_13x_m;
  end
always @(ac1, rd_hole_3, ac1, rd_hole_3, 1'b0)
  if (ac1 & ~rd_hole_3) begin
    n_t_12x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_3) begin
    n_t_12x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_12x_m <= 1'b0;
  end
always @(ac1, rd_hole_3, ac1, rd_hole_3, n_t_12x_m)
  if (ac1 & ~rd_hole_3) begin
    n_t_12x <= 1'b0;
  end else
  if (ac1 & rd_hole_3) begin
    n_t_12x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_12x <= n_t_12x_m;
  end
always @(ac1, rd_hole_4, ac1, rd_hole_4, 1'b0)
  if (ac1 & ~rd_hole_4) begin
    n_t_11x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_4) begin
    n_t_11x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_11x_m <= 1'b0;
  end
always @(ac1, rd_hole_4, ac1, rd_hole_4, n_t_11x_m)
  if (ac1 & ~rd_hole_4) begin
    n_t_11x <= 1'b0;
  end else
  if (ac1 & rd_hole_4) begin
    n_t_11x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_11x <= n_t_11x_m;
  end
// e2: sn7400 
assign rfc_delayed_l = ~(out_of_tape_l & n_t_30x);
assign out_of_tape_l = ~(~(n_t_34x & offline));
assign n_t_16x = ~(~out_of_tape_l & clock1);
assign clr_run_l = ~(~(n_t_16x & initialize_l));
// e4: sn7475 
always @(ac1, rd_hole_7, ac1, rd_hole_7, 1'b0)
  if (ac1 & ~rd_hole_7) begin
    n_t_3x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_7) begin
    n_t_3x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_3x_m <= 1'b0;
  end
always @(ac1, rd_hole_7, ac1, rd_hole_7, n_t_3x_m)
  if (ac1 & ~rd_hole_7) begin
    n_t_3x <= 1'b0;
  end else
  if (ac1 & rd_hole_7) begin
    n_t_3x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_3x <= n_t_3x_m;
  end
always @(ac1, rd_hole_8, ac1, rd_hole_8, 1'b0)
  if (ac1 & ~rd_hole_8) begin
    n_t_2x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_8) begin
    n_t_2x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_2x_m <= 1'b0;
  end
always @(ac1, rd_hole_8, ac1, rd_hole_8, n_t_2x_m)
  if (ac1 & ~rd_hole_8) begin
    n_t_2x <= 1'b0;
  end else
  if (ac1 & rd_hole_8) begin
    n_t_2x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_2x <= n_t_2x_m;
  end
always @(ac1, rd_hole_5, ac1, rd_hole_5, 1'b0)
  if (ac1 & ~rd_hole_5) begin
    n_t_10x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_5) begin
    n_t_10x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_10x_m <= 1'b0;
  end
always @(ac1, rd_hole_5, ac1, rd_hole_5, n_t_10x_m)
  if (ac1 & ~rd_hole_5) begin
    n_t_10x <= 1'b0;
  end else
  if (ac1 & rd_hole_5) begin
    n_t_10x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_10x <= n_t_10x_m;
  end
always @(ac1, rd_hole_6, ac1, rd_hole_6, 1'b0)
  if (ac1 & ~rd_hole_6) begin
    n_t_9x_m <= 1'b0;
  end else
  if (ac1 & rd_hole_6) begin
    n_t_9x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_9x_m <= 1'b0;
  end
always @(ac1, rd_hole_6, ac1, rd_hole_6, n_t_9x_m)
  if (ac1 & ~rd_hole_6) begin
    n_t_9x <= 1'b0;
  end else
  if (ac1 & rd_hole_6) begin
    n_t_9x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_9x <= n_t_9x_m;
  end
// e5: sn7474 
always @(ac1, clr_run_l, rfc_delayed_l, 1'b0)
  if (~clr_run_l) begin
    rdr_run_m <= 1'b0;
  end else
  if (~rfc_delayed_l) begin
    rdr_run_m <= 1'b1;
  end else
  if (~(ac1)) begin
    rdr_run_m <= 1'b0;
  end
always @(ac1, clr_run_l, rfc_delayed_l, rdr_run_m)
  if (~clr_run_l) begin
    rdr_run <= 1'b0;
  end else
  if (~rfc_delayed_l) begin
    rdr_run <= 1'b1;
  end else
  if (ac1) begin
    rdr_run <= rdr_run_m;
  end
assign rdr_run_l = ~rdr_run;
always @(ac1, clr_flag, n3va, rdr_run)
  if (~clr_flag) begin
    rdr_flag_m <= 1'b0;
  end else
  if (~n3va) begin
    rdr_flag_m <= 1'b1;
  end else
  if (~(ac1)) begin
    rdr_flag_m <= rdr_run;
  end
always @(ac1, clr_flag, n3va, rdr_flag_m)
  if (~clr_flag) begin
    rdr_flag <= 1'b0;
  end else
  if (~n3va) begin
    rdr_flag <= 1'b1;
  end else
  if (ac1) begin
    rdr_flag <= rdr_flag_m;
  end
// e6: sn7401 
// int_request = !rdr_flag; 
// skip = !(rdr_flag & iot_011); 
// out_of_tape = !out_of_tape_l; 
// n_t_37x = !(n_t_34x & !n_t_40x); 
// e7: sn7401 
// iob_in_4 = !(n_t_2x & at2); 
// iob_in_9 = !(n_t_12x & at2); 
// iob_in_7 = !(at2 & n_t_10x); 
// iob_in_11 = !(at2 & n_t_14x); 
// e8: sn7404 
// e9: sn7400 
assign iot_011_l = ~(iop1 & ~n_t_5x);
assign iot_014_l = ~(~n_t_5x & iop4);
assign n_t_29x = ~(iot_014_l & rfc_delayed_l);
assign iot_012_l = ~(iop2 & ~n_t_5x);
// e10: sn7410 
assign n_t_28x = ~(clk_l & bn1 & stop_complete);
assign bn1 = ~(ba1 & feed_switch & rdr_run_l);
assign clr_flag = ~(~(iot_012_l & rfc_delayed_l & clr_run_l));
// e11: sn7401 
// iob_in_5 = !(n_t_3x & at2); 
// iob_in_8 = !(n_t_11x & at2); 
// iob_in_6 = !(n_t_9x & at2); 
// iob_in_10 = !(at2 & n_t_13x); 
// e12: sn7440 
assign ac1 = ~n_t_39x;
// e13: sn7404 
assign ba1 = ~bv2;
assign iot_011 = ~iot_011_l;
// e14: sn7430 
assign n_t_5x = ~(mb8_lp_1_rp & mb6_lp_0_rp & mb4_lp_0_rp & mb4_lp_0_rp & mb5_lp_0_rp & mb7_lp_0_rp & mb3_lp_0_rp & mb3_lp_0_rp);
// e15: sn7474 
always @(stop_delay, shift_l, initialize_l, 1'b1)
  if (~shift_l) begin
    n_t_27x_m <= 1'b0;
  end else
  if (~initialize_l) begin
    n_t_27x_m <= 1'b1;
  end else
  if (~(stop_delay)) begin
    n_t_27x_m <= 1'b1;
  end
always @(stop_delay, shift_l, initialize_l, n_t_27x_m)
  if (~shift_l) begin
    n_t_27x <= 1'b0;
  end else
  if (~initialize_l) begin
    n_t_27x <= 1'b1;
  end else
  if (stop_delay) begin
    n_t_27x <= n_t_27x_m;
  end
always @(clock1, initialize_l, n_t_28x, bn1)
  if (~initialize_l) begin
    enable_m <= 1'b0;
  end else
  if (~n_t_28x) begin
    enable_m <= 1'b1;
  end else
  if (~(clock1)) begin
    enable_m <= bn1;
  end
always @(clock1, initialize_l, n_t_28x, enable_m)
  if (~initialize_l) begin
    enable <= 1'b0;
  end else
  if (~n_t_28x) begin
    enable <= 1'b1;
  end else
  if (clock1) begin
    enable <= enable_m;
  end
assign enable_l = ~enable;
// e16: sn7400 
assign n_t_25x = ~(~bb & ~ba);
assign bv2 = ~(n_t_25x & n_t_24x);
assign at2 = ~(bc1 & iot_012_l);
assign n_t_26x = ~(inhibit_strobe_l & enable);
// e17: sn7404 
assign ba_lp_0_rp = ~ba;
assign bb_lp_0_rp = ~bb;
assign bb_lp_1_rp = bb;
assign pwr = ~n_t_27x;
assign ba_lp_1_rp = ba;
assign n_t_21x = ~n_t_17x;
// e18: sn7474 
always @(shift, n3vb, n3va, ba)
  if (~n3vb) begin
    bb_m <= 1'b0;
  end else
  if (~n3va) begin
    bb_m <= 1'b1;
  end else
  if (~(shift)) begin
    bb_m <= ba;
  end
always @(shift, n3vb, n3va, bb_m)
  if (~n3vb) begin
    bb <= 1'b0;
  end else
  if (~n3va) begin
    bb <= 1'b1;
  end else
  if (shift) begin
    bb <= bb_m;
  end
always @(shift, n3vb, n3va, bb)
  if (~n3vb) begin
    ba_m <= 1'b0;
  end else
  if (~n3va) begin
    ba_m <= 1'b1;
  end else
  if (~(shift)) begin
    ba_m <= ~bb;
  end
always @(shift, n3vb, n3va, ba_m)
  if (~n3vb) begin
    ba <= 1'b0;
  end else
  if (~n3va) begin
    ba <= 1'b1;
  end else
  if (shift) begin
    ba <= ba_m;
  end
// e19: sn7400 
assign n_t_24x = ~(ba & bb);
assign n_t_41x = ~(n_t_40x & n_t_21x);
assign n_t_40x = ~(n_t_41x & enable_l);
// open collector 'wire-or's 
assign int_request = rdr_flag? ~rdr_flag: 1'bz;
assign iob_in_10 = (at2 & n_t_13x)? 1'b0: 1'bz;
assign iob_in_11 = (at2 & n_t_14x)? 1'b0: 1'bz;
assign iob_in_4 = (n_t_2x & at2)? 1'b0: 1'bz;
assign iob_in_5 = (n_t_3x & at2)? 1'b0: 1'bz;
assign iob_in_6 = (n_t_9x & at2)? 1'b0: 1'bz;
assign iob_in_7 = (at2 & n_t_10x)? 1'b0: 1'bz;
assign iob_in_8 = (n_t_11x & at2)? 1'b0: 1'bz;
assign iob_in_9 = (n_t_12x & at2)? 1'b0: 1'bz;
assign n_t_37x = (n_t_34x & ~n_t_40x)? 1'b0: 1'bz;
assign out_of_tape = out_of_tape_l? ~out_of_tape_l: 1'bz;
assign skip = (rdr_flag & iot_011)? 1'b0: 1'bz;
endmodule