Exported from /home/vrs/Eagle/projects/DEC/Mxxx/M706/M706H.sch Part Pad Pin Dir Net C1 1 1 pas VCC 2 2 pas GND C2 1 1 pas VCC 2 2 pas GND C3 1 1 pas VCC 2 2 pas GND C4 1 1 pas VCC 2 2 pas GND C5 1 1 pas VCC 2 2 pas GND C6 1 1 pas VCC 2 2 pas GND C7 1 1 pas VCC 2 2 pas GND C8 1 1 pas VCC 2 2 pas GND C9 1 1 pas VCC 2 2 pas GND C10 1 1 pas VCC 2 2 pas GND C11 1 1 pas VCC 2 2 pas GND C12 1 1 pas VCC 2 2 pas GND C13 1 1 pas VCC 2 2 pas GND C14 1 1 pas VCC 2 2 pas GND C15 1 1 pas VCC 2 2 pas GND C16 1 1 pas VCC 2 2 pas GND C17 1 1 pas VCC 2 2 pas GND C18 1 1 pas VCC 2 2 pas GND C19 1 1 pas VCC 2 2 pas GND C20 1 1 pas VCC 2 2 pas GND C21 1 1 pas VCC 2 2 pas GND C22 1 1 pas VCC 2 2 pas GND C23 1 1 pas VCC 2 2 pas GND C24 1 1 pas N$48 2 2 pas N$53 C25 1 1 pas READER_ENABLE 2 2 pas GND C27 1 1 pas +3V3 2 2 pas GND D1 A A pas GND C C pas SERIAL_IN D2 A A pas SERIAL_IN C C pas VCC D3 A A pas READER_ENABLE C C pas GND D4 A A pas N$56 C C pas GND D5 A A pas N$54 C C pas N$55 D6 A A pas GND C C pas N$53 D7 A A pas N$55 C C pas N$56 E1 1 I0 in N$15 2 I1 in N$21 3 I2 in N$20 4 I3 in N$19 5 I4 in N$18 6 I5 in N$17 8 O out N$10 11 I6 in +3V3 12 I7 in +3V3 E2 1 CLR in +3V3 2 D in N$27 3 CLK in CLOCK8_BAUD 4 PRE in +3V3 5 Q out 2^0 6 !Q out N$33 8 !Q out !IRQ 9 Q out FLAG 10 PRE in +3V3 11 CLK in SHIFT 12 D in SET_FLAG 13 CLR in N$11 E3 1 I0 in N$22 2 I1 in N$22 3 O out BUFFER_STROBE 4 I0 in N$12 5 I1 in N$12 6 O out N$11 8 O out N$23 9 I0 in N$16 10 I1 in N$10 11 O out N$22 12 I0 in N$23 13 I1 in READ_BUFFER E4 1 I0 in N$6 2 I1 in BUFFER_STROBE 3 O out BIT4 4 I0 in N$9 5 I1 in BUFFER_STROBE 6 O out BIT2 8 O out BIT6 9 I0 in N$4 10 I1 in BUFFER_STROBE 11 O out BIT5 12 I0 in BUFFER_STROBE 13 I1 in N$7 E5 1 CLR in +3V3 2 D in N$9 3 CLK in SHIFT 4 PRE in PRESET 5 Q out N$8 6 !Q out SET_FLAG 9 Q out N$9 10 PRE in PRESET 11 CLK in SHIFT 12 D in N$5 13 CLR in +3V3 E6 1 CLR in +3V3 2 D in N$6 3 CLK in SHIFT 4 PRE in PRESET 5 Q out N$5 9 Q out N$6 10 PRE in PRESET 11 CLK in SHIFT 12 D in N$7 13 CLR in +3V3 E7 1 I0 in N$5 2 I1 in BUFFER_STROBE 3 O out BIT3 4 I0 in BUFFER_STROBE 5 I1 in N$2 6 O out BIT7 8 O out BIT8 9 I0 in BUFFER_STROBE 10 I1 in N$3 11 O out BIT1 12 I0 in N$8 13 I1 in BUFFER_STROBE E8 1 CLR in +3V3 2 D in N$31 3 CLK in SHIFT 4 PRE in PRESET 5 Q out N$7 9 Q out N$4 10 PRE in PRESET 11 CLK in SHIFT 12 D in N$2 13 CLR in +3V3 E9 1 I0 in N$24 2 I1 in !IO_CLEAR 3 I0 in !IO_CLEAR 4 I1 in !IO_CLEAR 5 I2 in N$28 6 O out N$29 8 O out N$32 9 I0 in N$29 10 I1 in N$29 11 I2 in N$29 12 O out N$12 13 I2 in N$25 E10 1 CLR in +3V3 2 D in N$3 3 CLK in SHIFT 4 PRE in PRESET 5 Q out N$2 9 Q out N$3 10 PRE in PRESET 11 CLK in SHIFT 12 D in N$14 13 CLR in +3V3 E11 1 I0 in SKIP_STROBE 2 I1 in N$23 3 I0 in N$23 4 I1 in +3V3 5 I2 in CLR_FLG2 6 O out N$25 8 O out N$28 9 I0 in SHIFT 10 I1 in SERIAL 11 I2 in SPIKE 12 O out I/O_SKIP 13 I2 in FLAG E12 1 I0 in N$42 2 I1 in N$42 3 O out N$13 4 I0 in IN_LAST 5 I1 in N$43 6 O out N$42 8 O out !IO_CLEAR 9 I0 in I/O_CLEAR 10 I1 in +3V3 11 O out N$24 12 I0 in +3V3 13 I1 in CLR_FLG1 E13 1 CLR in PRESET 2 D in GND 3 CLK in GND 4 PRE in N$50 5 Q out N$52 6 !Q out !READER_RUN 9 Q out SPIKE 10 PRE in PRESET 11 CLK in N$43 12 D in GND 13 CLR in !IO_CLEAR E14 1 CLR in N$32 2 D in GND 3 CLK in N$13 4 PRE in PRESET 5 Q out ACTIVE 6 !Q out !ACTIVE 8 !Q out !IN_LAST 9 Q out IN_LAST 10 PRE in +3V3 11 CLK in SHIFT 12 D in SET_FLAG 13 CLR in N$57 E15 1 I0 in ACTIVE 2 I1 in N$63 3 O out N$43 4 I0 in N$43 5 I1 in N$43 6 O out N$48 8 O out N$26 9 I0 in N$53 10 I1 in N$53 11 O out N$45 12 I0 in !IN_LAST 13 I1 in !ACTIVE E16 1 CLR in N$45 2 D in N$36 3 CLK in N$34 4 PRE in +3V3 5 Q out N$35 6 !Q out N$36 8 !Q out N$34 10 PRE in +3V3 11 CLK in N$33 12 D in N$34 13 CLR in N$45 E17 1 A in SERIAL_IN 2 B in SERIAL_IN 3 C in SERIAL_IN 4 A in N$38 5 B in N$38 6 C in N$38 8 D in N$38 9 !X out !SERIAL 10 X out N$39 11 X out N$39 12 !X out N$38 13 D in SERIAL_IN E18 1 CLR in PRESET 2 D in !ACTIVE 3 CLK in N$37 4 PRE in N$62 5 Q out N$61 6 !Q out N$59 8 !Q out N$60 10 PRE in N$62 11 CLK in N$37 12 D in N$61 13 CLR in PRESET E19 1 I0 in N$26 2 I1 in N$26 4 I2 in N$26 5 I3 in N$26 6 O out SHIFT 8 O out PRESET 9 I0 in ENABLE 10 I1 in N$1 12 I2 in !SERIAL 13 I3 in CLOCK8_BAUD E20 1 I0 in 2^0 2 I1 in N$45 3 O out N$27 4 I0 in N$47 5 I1 in BUFFER_STROBE 6 O out N$46 8 O out SERIAL 9 I0 in !SERIAL 10 I1 in !SERIAL 11 O out N$1 12 I0 in N$45 13 I1 in N$45 Q1 1 E pas N$54 2 B pas !READER_RUN 3 C pas READER_ENABLE R1 1 1 pas GND 2 2 pas +3V3 R2 1 1 pas +3V3 2 2 pas VCC R3 1 1 pas !READER_RUN 2 2 pas VCC R4 1 1 pas !SERIAL 2 2 pas VCC R5 1 1 pas GND 2 2 pas N$39 R6 1 1 pas N$54 2 2 pas VCC R7 1 1 pas GND 2 2 pas N$53 R8 1 1 pas N$48 2 2 pas VCC U$2 AA2 1 io VCC AC2 1 io GND AD1 1 io +3V3 AD2 1 io N$17 AE1 1 io N$18 AE2 1 io N$11 AF1 1 io N$19 AF2 1 io !IRQ AH1 1 io N$20 AH2 1 io N$21 AJ1 1 io N$15 AJ2 1 io N$31 AK1 1 io N$4 AK2 1 io BIT8 AL1 1 io BIT5 AL2 1 io READ_BUFFER AM1 1 io BIT4 AM2 1 io SERIAL AN1 1 io CLOCK8_BAUD AN2 1 io BIT1 AP1 1 io N$16 AP2 1 io BIT3 AR1 1 io N$14 AR2 1 io BIT7 AS1 1 io SHIFT AS2 1 io BIT6 AT1 1 io GND AT2 1 io BIT2 AU2 1 io READER_ENABLE AV2 1 io N$50 BA2 1 io VCC BC2 1 io GND BD1 1 io CLR_FLG1 BD2 1 io SKIP_STROBE BE2 1 io N$25 BF2 1 io I/O_CLEAR BH2 1 io I/O_SKIP BJ2 1 io CLR_FLG2 BL2 1 io N$52 BM1 1 io N$47 BM2 1 io SERIAL_IN BN1 1 io N$46 BN2 1 io !ACTIVE BP1 1 io N$62 BP2 1 io N$37 BR1 1 io ENABLE BR2 1 io N$57 BS1 1 io N$36 BS2 1 io PRESET BT1 1 io GND BT2 1 io N$35 BU1 1 io N$63 BU2 1 io N$59 BV2 1 io N$60