// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// c18: c_us 
// c19: c_us 
// c20: c_us 
// c21: c_us 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c25: c_us 
// c26: c_us 
// c27: c_us 
// c28: c_us 
// e1: sn7430 
module m706o (n_t_49x, n_t_53x, active_l, bit1, bit2, bit3, bit4, bit5, bit6, bit7, bit8, buffer_strobe, clock8_baud, clr_flg1, clr_flg2, enable, i_o_clear, i_o_skip, irq_l, n3v3, n_t_11x, n_t_14x, n_t_15x, n_t_16x, n_t_17x, n_t_18x, n_t_19x, n_t_20x, n_t_21x, n_t_25x, n_t_31x, n_t_35x, n_t_36x, n_t_37x, n_t_39x, n_t_46x, n_t_47x, n_t_48x, n_t_4x, n_t_50x, n_t_52x, n_t_57x, n_t_58x, n_t_59x, n_t_60x, n_t_62x, n_t_63x, preset, read_buffer, reader_enable, reader_run_l, serial, serial_in, serial_l, shift, skip_strobe);
input n_t_49x;
input n_t_53x;
inout active_l;
output bit1;
output bit2;
output bit3;
output bit4;
output bit5;
output bit6;
output bit7;
output bit8;
inout buffer_strobe;
input clock8_baud;
input clr_flg1;
input clr_flg2;
input enable;
input i_o_clear;
output i_o_skip;
output irq_l;
input n3v3;
inout n_t_11x;
input n_t_14x;
input n_t_15x;
input n_t_16x;
input n_t_17x;
input n_t_18x;
input n_t_19x;
input n_t_20x;
input n_t_21x;
inout n_t_25x;
input n_t_31x;
inout reg n_t_35x;
inout n_t_36x;
input n_t_37x;
inout n_t_39x;
output n_t_46x;
input n_t_47x;
output n_t_48x;
inout reg n_t_4x;
input n_t_50x;
inout reg n_t_52x;
input n_t_57x;
output n_t_58x;
output n_t_59x;
output reg n_t_60x;
input n_t_62x;
input n_t_63x;
inout preset;
input read_buffer;
output reader_enable;
output reader_run_l;
inout serial;
input serial_in;
inout serial_l;
inout shift;
input skip_strobe;

reg active_m;
reg flag_m;
reg in_last_m;
reg n2^0_m;
reg n_t_2x_m;
reg n_t_34x_m;
reg n_t_35x_m;
reg n_t_3x_m;
reg n_t_4x_m;
reg n_t_52x_m;
reg n_t_5x_m;
reg n_t_60x_m;
reg n_t_61x_m;
reg n_t_6x_m;
reg n_t_7x_m;
reg n_t_8x_m;
reg n_t_9x_m;
reg spike_m;

reg n2^0;
reg flag;
reg n_t_8x;
reg n_t_9x;
reg n_t_5x;
reg n_t_6x;
reg n_t_7x;
reg n_t_2x;
reg n_t_3x;
reg spike;
reg active;
reg in_last;
reg n_t_34x;
reg n_t_61x;
wire io_clear_l;
wire n_t_10x;
wire n_t_12x;
wire n_t_23x;
wire n_t_24x;
wire n_t_27x;
wire n_t_28x;
wire n_t_29x;
wire n_t_33x;
wire n_t_42x;
wire n_t_43x;
wire n_t_45x;
wire set_flag;
wire start;
assign n_t_10x = ~(n_t_15x & n_t_21x & n_t_20x & n_t_19x & n_t_18x & n_t_17x & n3v3 & n3v3);
// e2: sn7474 
always @(clock8_baud, n3v3, n3v3, n_t_27x)
  if (~n3v3) begin
    n2^0_m <= 1'b0;
  end else
  if (~n3v3) begin
    n2^0_m <= 1'b1;
  end else
  if (~(clock8_baud)) begin
    n2^0_m <= n_t_27x;
  end
always @(clock8_baud, n3v3, n3v3, n20_m)
  if (~n3v3) begin
    n2^0 <= 1'b0;
  end else
  if (~n3v3) begin
    n2^0 <= 1'b1;
  end else
  if (clock8_baud) begin
    n2^0 <= n2^0_m;
  end
assign n_t_33x = ~n2^0;
always @(shift, n_t_11x, n3v3, set_flag)
  if (~n_t_11x) begin
    flag_m <= 1'b0;
  end else
  if (~n3v3) begin
    flag_m <= 1'b1;
  end else
  if (~(shift)) begin
    flag_m <= set_flag;
  end
always @(shift, n_t_11x, n3v3, flag_m)
  if (~n_t_11x) begin
    flag <= 1'b0;
  end else
  if (~n3v3) begin
    flag <= 1'b1;
  end else
  if (shift) begin
    flag <= flag_m;
  end
assign irq_l = ~flag;
// e3: sn7400 
assign n_t_11x = ~n_t_12x;
assign n_t_23x = ~(n_t_16x & n_t_10x);
assign buffer_strobe = ~(~(n_t_23x & read_buffer));
// e4: sn7400 
assign bit4 = ~(n_t_6x & buffer_strobe);
assign bit2 = ~(n_t_9x & buffer_strobe);
assign bit6 = ~(n_t_4x & buffer_strobe);
assign bit5 = ~(buffer_strobe & n_t_7x);
// e5: sn7474 
always @(shift, n3v3, preset, n_t_9x)
  if (~n3v3) begin
    n_t_8x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_8x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_8x_m <= n_t_9x;
  end
always @(shift, n3v3, preset, n_t_8x_m)
  if (~n3v3) begin
    n_t_8x <= 1'b0;
  end else
  if (~preset) begin
    n_t_8x <= 1'b1;
  end else
  if (shift) begin
    n_t_8x <= n_t_8x_m;
  end
assign set_flag = ~n_t_8x;
always @(shift, n3v3, preset, n_t_5x)
  if (~n3v3) begin
    n_t_9x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_9x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_9x_m <= n_t_5x;
  end
always @(shift, n3v3, preset, n_t_9x_m)
  if (~n3v3) begin
    n_t_9x <= 1'b0;
  end else
  if (~preset) begin
    n_t_9x <= 1'b1;
  end else
  if (shift) begin
    n_t_9x <= n_t_9x_m;
  end
// e6: sn7474 
always @(shift, n3v3, preset, n_t_6x)
  if (~n3v3) begin
    n_t_5x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_5x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_5x_m <= n_t_6x;
  end
always @(shift, n3v3, preset, n_t_5x_m)
  if (~n3v3) begin
    n_t_5x <= 1'b0;
  end else
  if (~preset) begin
    n_t_5x <= 1'b1;
  end else
  if (shift) begin
    n_t_5x <= n_t_5x_m;
  end
always @(shift, n3v3, preset, n_t_7x)
  if (~n3v3) begin
    n_t_6x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_6x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_6x_m <= n_t_7x;
  end
always @(shift, n3v3, preset, n_t_6x_m)
  if (~n3v3) begin
    n_t_6x <= 1'b0;
  end else
  if (~preset) begin
    n_t_6x <= 1'b1;
  end else
  if (shift) begin
    n_t_6x <= n_t_6x_m;
  end
// e7: sn7400 
assign bit3 = ~(n_t_5x & buffer_strobe);
assign bit7 = ~(buffer_strobe & n_t_2x);
assign bit8 = ~(buffer_strobe & n_t_3x);
assign bit1 = ~(n_t_8x & buffer_strobe);
// e8: sn7474 
always @(shift, n3v3, preset, n_t_31x)
  if (~n3v3) begin
    n_t_7x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_7x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_7x_m <= n_t_31x;
  end
always @(shift, n3v3, preset, n_t_7x_m)
  if (~n3v3) begin
    n_t_7x <= 1'b0;
  end else
  if (~preset) begin
    n_t_7x <= 1'b1;
  end else
  if (shift) begin
    n_t_7x <= n_t_7x_m;
  end
always @(shift, n3v3, preset, n_t_2x)
  if (~n3v3) begin
    n_t_4x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_4x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_4x_m <= n_t_2x;
  end
always @(shift, n3v3, preset, n_t_4x_m)
  if (~n3v3) begin
    n_t_4x <= 1'b0;
  end else
  if (~preset) begin
    n_t_4x <= 1'b1;
  end else
  if (shift) begin
    n_t_4x <= n_t_4x_m;
  end
// e9: sn7410 
assign n_t_12x = ~(n_t_24x & io_clear_l & n_t_25x);
assign n_t_29x = ~(io_clear_l & n_t_28x);
// e10: sn7474 
always @(shift, n3v3, preset, n_t_3x)
  if (~n3v3) begin
    n_t_2x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_2x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_2x_m <= n_t_3x;
  end
always @(shift, n3v3, preset, n_t_2x_m)
  if (~n3v3) begin
    n_t_2x <= 1'b0;
  end else
  if (~preset) begin
    n_t_2x <= 1'b1;
  end else
  if (shift) begin
    n_t_2x <= n_t_2x_m;
  end
always @(shift, n3v3, preset, n_t_14x)
  if (~n3v3) begin
    n_t_3x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_3x_m <= 1'b1;
  end else
  if (~(shift)) begin
    n_t_3x_m <= n_t_14x;
  end
always @(shift, n3v3, preset, n_t_3x_m)
  if (~n3v3) begin
    n_t_3x <= 1'b0;
  end else
  if (~preset) begin
    n_t_3x <= 1'b1;
  end else
  if (shift) begin
    n_t_3x <= n_t_3x_m;
  end
// e11: sn7410 
assign i_o_skip = ~(skip_strobe & n_t_23x & flag);
assign n_t_25x = ~(n_t_23x & n3v3 & clr_flg2);
assign n_t_28x = ~(shift & serial & spike);
// e12: sn7400 
assign n_t_42x = ~(in_last & n_t_43x);
assign io_clear_l = ~(i_o_clear & n3v3);
assign n_t_24x = ~(n3v3 & clr_flg1);
// e13: sn7474 
always @(preset, n_t_50x, 1'b0)
  if (~preset) begin
    n_t_52x_m <= 1'b0;
  end else
  if (~n_t_50x) begin
    n_t_52x_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    n_t_52x_m <= 1'b0;
  end
always @(preset, n_t_50x, n_t_52x_m)
  if (~preset) begin
    n_t_52x <= 1'b0;
  end else
  if (~n_t_50x) begin
    n_t_52x <= 1'b1;
  end else
  if (1'b0) begin
    n_t_52x <= n_t_52x_m;
  end
assign reader_run_l = ~n_t_52x;
always @(n_t_43x, io_clear_l, preset, 1'b0)
  if (~io_clear_l) begin
    spike_m <= 1'b0;
  end else
  if (~preset) begin
    spike_m <= 1'b1;
  end else
  if (~(n_t_43x)) begin
    spike_m <= 1'b0;
  end
always @(n_t_43x, io_clear_l, preset, spike_m)
  if (~io_clear_l) begin
    spike <= 1'b0;
  end else
  if (~preset) begin
    spike <= 1'b1;
  end else
  if (n_t_43x) begin
    spike <= spike_m;
  end
// e14: sn7474 
always @(n_t_42x, n_t_29x, start, 1'b0)
  if (n_t_29x) begin
    active_m <= 1'b0;
  end else
  if (~start) begin
    active_m <= 1'b1;
  end else
  if (~(~n_t_42x)) begin
    active_m <= 1'b0;
  end
always @(n_t_42x, n_t_29x, start, active_m)
  if (n_t_29x) begin
    active <= 1'b0;
  end else
  if (~start) begin
    active <= 1'b1;
  end else
  if (~n_t_42x) begin
    active <= active_m;
  end
assign active_l = ~active;
always @(shift, n_t_57x, n3v3, set_flag)
  if (~n_t_57x) begin
    in_last_m <= 1'b0;
  end else
  if (~n3v3) begin
    in_last_m <= 1'b1;
  end else
  if (~(shift)) begin
    in_last_m <= set_flag;
  end
always @(shift, n_t_57x, n3v3, in_last_m)
  if (~n_t_57x) begin
    in_last <= 1'b0;
  end else
  if (~n3v3) begin
    in_last <= 1'b1;
  end else
  if (shift) begin
    in_last <= in_last_m;
  end
// e15: sn7440 
assign preset = ~n_t_49x;
assign n_t_58x = ~(active_l & n3v3 & n3v3 & n3v3);
// e16: sn7400 
assign n_t_43x = ~(active & n_t_63x);
assign n_t_48x = ~n_t_43x;
assign shift = ~(~n_t_53x);
assign n_t_45x = ~(~in_last & active_l);
// e17: sn7474 
always @(n_t_34x, n_t_45x, n3v3, n_t_36x)
  if (~n_t_45x) begin
    n_t_35x_m <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_35x_m <= 1'b1;
  end else
  if (~(n_t_34x)) begin
    n_t_35x_m <= n_t_36x;
  end
always @(n_t_34x, n_t_45x, n3v3, n_t_35x_m)
  if (~n_t_45x) begin
    n_t_35x <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_35x <= 1'b1;
  end else
  if (n_t_34x) begin
    n_t_35x <= n_t_35x_m;
  end
assign n_t_36x = ~n_t_35x;
always @(n_t_33x, n3v3, n_t_45x, n_t_34x)
  if (~n3v3) begin
    n_t_34x_m <= 1'b0;
  end else
  if (~n_t_45x) begin
    n_t_34x_m <= 1'b1;
  end else
  if (~(n_t_33x)) begin
    n_t_34x_m <= ~n_t_34x;
  end
always @(n_t_33x, n3v3, n_t_45x, n_t_34x_m)
  if (~n3v3) begin
    n_t_34x <= 1'b0;
  end else
  if (~n_t_45x) begin
    n_t_34x <= 1'b1;
  end else
  if (n_t_33x) begin
    n_t_34x <= n_t_34x_m;
  end
// e18: sn7460 
// n_t_39x = !serial_in; 
// !n_t_39x = !n_t_39x; 
// n_t_39x = n_t_39x; 
// serial_l = !n_t_39x; 
// e19: sn7474 
always @(n_t_37x, preset, n_t_62x, active_l)
  if (~preset) begin
    n_t_61x_m <= 1'b0;
  end else
  if (~n_t_62x) begin
    n_t_61x_m <= 1'b1;
  end else
  if (~(n_t_37x)) begin
    n_t_61x_m <= active_l;
  end
always @(n_t_37x, preset, n_t_62x, n_t_61x_m)
  if (~preset) begin
    n_t_61x <= 1'b0;
  end else
  if (~n_t_62x) begin
    n_t_61x <= 1'b1;
  end else
  if (n_t_37x) begin
    n_t_61x <= n_t_61x_m;
  end
assign n_t_59x = ~n_t_61x;
always @(n_t_37x, n_t_62x, preset, n_t_61x)
  if (~n_t_62x) begin
    n_t_60x_m <= 1'b0;
  end else
  if (~preset) begin
    n_t_60x_m <= 1'b1;
  end else
  if (~(n_t_37x)) begin
    n_t_60x_m <= ~n_t_61x;
  end
always @(n_t_37x, n_t_62x, preset, n_t_60x_m)
  if (~n_t_62x) begin
    n_t_60x <= 1'b0;
  end else
  if (~preset) begin
    n_t_60x <= 1'b1;
  end else
  if (n_t_37x) begin
    n_t_60x <= n_t_60x_m;
  end
// e20: sn7440 
assign start = ~(enable & ~n_t_45x & serial_l & clock8_baud);
// e21: sn7400 
assign n_t_27x = ~(n2^0 & n_t_45x);
assign n_t_46x = ~(n_t_47x & buffer_strobe);
assign serial = ~serial_l;
// open collector 'wire-or's 
assign n_t_39x = serial_in
                  | (~(1'b0))? 1'b0: 1'bz;
assign serial_l = n_t_39x? ~n_t_39x: 1'bz;
endmodule