~/Verilog/bin/topld.pl M706X
info: 1n4154 ne 1n4148do35_10
warning: making d1/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d2/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d3/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d4/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d5/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d6/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d7/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d8/1n4154/ a connector
info: 7430n ne dil14
info: 7410n ne dil14
info: 7400n ne dil14
info: 7440n ne 7420n
info: 7400n ne dil14
info: 7460n ne dil14
info: 7440n ne 7420n
info: 7400n ne dil14
info: 7400n ne dil14
info: 7400n ne dil14
info: 7400n ne dil14
info: 7410n ne dil14
info: 2n3906 ne 2n2904
warning: making q1/2n3906/ a connector
info: double ne edge_con4
warning: making u$2/double/ a connector
warning: non-bypass capacitor deleted: c24
warning: non-bypass capacitor deleted: c25
warning: non-bypass capacitor deleted: c27
warning: non-bypass capacitor deleted: c28
~/Verilog/bin/smaller.pl M706X.PLD >vv || (rm vv; exit 1)
7 signals were removed:
  in_last_l: !in_last
  n_t_13x: !n_t_42x
  n_t_1x: !n_t_45x
  n_t_22x: !buffer_strobe
  n_t_26x: !shift
  n_t_32x: !n_t_29x
  n_t_38x: !n_t_39x
~/Verilog/bin/smaller.pl vv >M706XX.PLD || (rm M706XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M706XX.PLD >vv || (rm vv; exit 1)
mv vv M706X.v
rm M706XX.PLD