~/Verilog/bin/topld.pl M7075C
info: 7475n ne dil16
info: 7475n ne dil16
info: 8266 ne dil16
info: dec8271 ne dil16
info: 7404n ne dil14
info: 8266 ne dil16
info: dec8271 ne dil16
info: dec4015 ne dil16
info: 7410n ne dil14
info: 7400n ne dil14
info: 7416n ne dil14
info: 7416n ne dil14
info: 7400n ne dil14
info: single ne edge_con2
warning: making u$2/single/ a connector
~/Verilog/bin/smaller.pl M7075C.PLD >vv || (rm vv; exit 1)
12 signals were removed:
  n3v: 'b'1
  n_t_123x: !gdollar_5
  n_t_125x: !gdollar_4
  n_t_27x: !gdollar_2
  n_t_29x: !gdollar_1
  n_t_32x: !gdollar_3
  n_t_3x: !gdollar_6
  n_t_67x: !e1
  n_t_76x: !n_t_99x
  n_t_80x: !u1
  n_t_81x: !n_t_101x
  n_t_91x: !v2
~/Verilog/bin/smaller.pl vv >M7075CX.PLD || (rm M7075CX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M7075CX.PLD >vv || (rm vv; exit 1)
mv vv M7075C.v
rm M7075CX.PLD