// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
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// c27: cpol_use 
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// e1: sn74161 
module m7106c (bdata7, btp2, btp3, btp3_ok, clr_all_l, clr_drive_cmd_l, clr_sector_ad_l, crc16, data_enab_l, data_enable, dsk_acknowledge_l, dsk_data_in_l, dsk_file_rdy_l, dsk_index_mk_l, dsk_rd_clk_l, dsk_sec1_l, dsk_sec2_l, dsk_sec4_l, dsk_sec8_l, dsk_sector_mk_l, dsk_wrt_status_l, error_clr_l, function00, function01, function02, half_block, hi_main_shft_l, last_brk, last_word, lo_main_shft_l, main_l, n3v, n6rk3_ok, n_t_18x, n_t_21x, n_t_24x, n_t_36x, n_t_49x, n_t_52x, n_t_53x, n_t_57x, n_t_60x, n_t_74x, n_t_76x, n_t_7x, n_t_8x, n_t_90x, n_t_9x, rdy_s_r_w, rk_data11, set_idle_pl_l, shft_surf, b_idle, b_last_brk, bdata10, bdata11, bdata8, bdata9, brk_enab_clk, brk_in_clk, clr_cntrs_l, crc_data, data10_l, data11_l, data8_l, data9_l, data_clk_ok, data_clr_l, data_in_l, data_state, data_state_l, drv_revo, dsk_head_sel1_l, dsk_read_l, dsk_restore_l, dsk_strobe_l, dsk_wrt_clk_data_l, dsk_wrt_erase_gate_l, dsk_wrt_protect_l, end_state, end_state_l, erase_dly_l, file_rdy, idle, idle_l, initialize, inside_in_l, last_word_pl, ld_disk_addrs, ma0_l, ma10_l, ma11_l, ma1_l, ma3_l, md0_l, md10_l, md11_l, md1_l, md2_l, md8_l, md9_l, n12th_bit_ok, n12th_carry_l, n16_carry, n_t_16x, n_t_20x, n_t_25x, n_t_40x, n_t_56x, n_t_59x, n_t_61x, n_t_6x, outside_clk_l, rd_clk1, rd_shft_db_l, read_dly_l, sector_addrs1, sector_mk, sector_mk_l, sector_seek_l, shft_wrt_buff_l, shift_crc_l, skip_l, state_enab_b, strobe, sync_dly_l, write, wrt_cmd, wrt_cmd_l);
input bdata7;
input btp2;
input btp3;
input btp3_ok;
input clr_all_l;
input clr_drive_cmd_l;
input clr_sector_ad_l;
input crc16;
input data_enab_l;
input data_enable;
input dsk_acknowledge_l;
input dsk_data_in_l;
input dsk_file_rdy_l;
input dsk_index_mk_l;
input dsk_rd_clk_l;
input dsk_sec1_l;
input dsk_sec2_l;
input dsk_sec4_l;
input dsk_sec8_l;
input dsk_sector_mk_l;
input dsk_wrt_status_l;
input error_clr_l;
input function00;
input function01;
input function02;
input half_block;
input hi_main_shft_l;
input last_brk;
input last_word;
input lo_main_shft_l;
input main_l;
input n3v;
input n6rk3_ok;
input n_t_18x;
input n_t_21x;
input n_t_24x;
input n_t_36x;
output n_t_49x;
output n_t_52x;
output n_t_53x;
input n_t_57x;
input n_t_60x;
output n_t_74x;
output n_t_76x;
input n_t_7x;
output n_t_8x;
output n_t_90x;
output n_t_9x;
input rdy_s_r_w;
input rk_data11;
input set_idle_pl_l;
input shft_surf;
inout b_idle;
output b_last_brk;
inout bdata10;
inout bdata11;
inout bdata8;
inout bdata9;
output brk_enab_clk;
inout brk_in_clk;
inout clr_cntrs_l;
output crc_data;
input data10_l;
input data11_l;
input data8_l;
input data9_l;
output data_clk_ok;
input data_clr_l;
output data_in_l;
inout reg data_state;
inout data_state_l;
output drv_revo;
output dsk_head_sel1_l;
output dsk_read_l;
output dsk_restore_l;
output dsk_strobe_l;
output dsk_wrt_clk_data_l;
output dsk_wrt_erase_gate_l;
output dsk_wrt_protect_l;
inout reg end_state;
output end_state_l;
input erase_dly_l;
inout file_rdy;
inout idle;
inout reg idle_l;
output initialize;
input inside_in_l;
output last_word_pl;
inout ld_disk_addrs;
output ma0_l;
output ma10_l;
output ma11_l;
output ma1_l;
output ma3_l;
output md0_l;
output md10_l;
output md11_l;
output md1_l;
output md2_l;
output md8_l;
output md9_l;
output n12th_bit_ok;
inout n12th_carry_l;
inout n16_carry;
output n_t_16x;
inout n_t_20x;
output n_t_25x;
output n_t_40x;
output n_t_56x;
output n_t_59x;
output n_t_61x;
output n_t_6x;
input outside_clk_l;
inout rd_clk1;
output rd_shft_db_l;
input read_dly_l;
inout reg sector_addrs1;
inout sector_mk;
inout sector_mk_l;
output sector_seek_l;
output shft_wrt_buff_l;
output shift_crc_l;
output skip_l;
inout state_enab_b;
inout reg strobe;
input sync_dly_l;
inout reg write;
inout wrt_cmd;
inout wrt_cmd_l;

reg crc_state_m;
reg data_in_m;
reg data_state_m;
reg end_state_m;
reg gdollar_0_m;
reg gdollar_1_m;
reg gdollar_10_m;
reg gdollar_11_m;
reg gdollar_12_m;
reg gdollar_13_m;
reg gdollar_14_m;
reg gdollar_15_m;
reg gdollar_16_m;
reg gdollar_17_m;
reg gdollar_18_m;
reg gdollar_19_m;
reg gdollar_2_m;
reg gdollar_3_m;
reg gdollar_4_m;
reg gdollar_5_m;
reg gdollar_6_m;
reg gdollar_7_m;
reg gdollar_8_m;
reg gdollar_9_m;
reg header_a_m;
reg header_b_m;
reg header_c_m;
reg header_d_m;
reg header_e_m;
reg idle_l_m;
reg inh_12th_bit_l_m;
reg n128th_word_m;
reg n_t_11x_m;
reg n_t_13x_m;
reg n_t_14x_m;
reg n_t_31x_m;
reg read_l_m;
reg restore_m;
reg sector_addrs1_m;
reg sector_addrs2_m;
reg sector_addrs4_m;
reg sector_addrs8_m;
reg sector_seek_m;
reg strobe_m;
reg top_surf_m;
reg write_m;
reg wrt_sync_bit_m;

reg gdollar_0;
reg gdollar_1;
reg gdollar_2;
reg gdollar_3;
reg n_t_11x;
reg n_t_13x;
reg gdollar_4;
reg n_t_14x;
reg gdollar_5;
reg gdollar_6;
reg gdollar_7;
reg gdollar_8;
reg gdollar_9;
reg gdollar_10;
reg gdollar_11;
reg n128th_word;
reg gdollar_12;
reg gdollar_13;
reg gdollar_14;
reg gdollar_15;
reg gdollar_16;
reg gdollar_17;
reg gdollar_18;
reg gdollar_19;
reg data_in;
reg inh_12th_bit_l;
reg restore;
reg header_a;
reg header_b;
reg header_c;
reg crc_state;
reg header_e;
reg sector_seek;
reg header_d;
reg wrt_sync_bit;
reg read_l;
reg n_t_31x;
reg top_surf;
reg sector_addrs8;
reg sector_addrs4;
reg sector_addrs2;
wire gdollar_20;
wire gdollar_21;
wire gdollar_22;
wire gdollar_23;
wire b_wrt_clk;
wire check_header_cmd_l;
wire clr_cntrs;
wire clr_states;
wire clr_strobe_l;
wire data_clk;
wire data_out_pl_l;
wire disk_ok;
wire go;
wire in;
wire inc_brk_cntr_l;
wire inc_cntrs;
wire last_word_pl_l;
wire n16th_bit_l;
wire n_t_10x;
wire n_t_15x;
wire n_t_17x;
wire n_t_19x;
wire n_t_1x;
wire n_t_27x;
wire n_t_28x;
wire n_t_29x;
wire n_t_2x;
wire n_t_32x;
wire n_t_35x;
wire n_t_37x;
wire n_t_38x;
wire n_t_39x;
wire n_t_3x;
wire n_t_42x;
wire n_t_43x;
wire n_t_44x;
wire n_t_45x;
wire n_t_46x;
wire n_t_51x;
wire n_t_54x;
wire n_t_58x;
wire n_t_62x;
wire n_t_63x;
wire n_t_65x;
wire n_t_67x;
wire n_t_68x;
wire n_t_69x;
wire n_t_70x;
wire n_t_71x;
wire n_t_72x;
wire n_t_75x;
wire n_t_77x;
wire n_t_78x;
wire n_t_79x;
wire n_t_80x;
wire n_t_81x;
wire n_t_85x;
wire not_chk_header_cmd;
wire rd_clk1_l;
wire rd_clk2;
wire rd_shft_crc;
wire rd_sync_bit_l;
wire read_clk;
wire read_data_in;
wire sector_eq;
wire seek_l;
wire seek_only;
wire set_header_e_l;
wire set_sector_seek_l;
wire sk_chk_rd_l;
wire sk_chk_wrt_l;
wire sk_rd_l;
wire sk_wrt_l;
wire state_enab_a_l;
wire wrt_clk_data;
wire wrt_clk_l;
wire wrt_lock_out_l;
wire wrt_shft_crc;
always @(inc_cntrs, clr_cntrs_l, n3v, n3v, n3v, n3v, n3v, gdollar_0)
  if (~clr_cntrs_l) begin
    gdollar_0_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_0_m <= ~(~n3v) & (n3v
                                 | ~n3v)? ((n3v
                       | ~n3v)? ~gdollar_0: 1'b1) : ((n3v
                       | ~n3v)? 1'b0: gdollar_0);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_0_m)
  if (~clr_cntrs_l) begin
    gdollar_0 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n3v, gdollar_0, n3v, n3v, gdollar_0, n3v, gdollar_1)
  if (~clr_cntrs_l) begin
    gdollar_1_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_1_m <= ~(~n3v) & ((n3v & gdollar_0)
                                 | ~n3v)? (((n3v & gdollar_0)
                       | ~n3v)? ~gdollar_1: 1'b1) : (((n3v & gdollar_0)
                       | ~n3v)? 1'b0: gdollar_1);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_1_m)
  if (~clr_cntrs_l) begin
    gdollar_1 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_1 <= gdollar_1_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n3v, gdollar_0, gdollar_1, n3v, n3v, gdollar_0, gdollar_1, n3v, gdollar_2)
  if (~clr_cntrs_l) begin
    gdollar_2_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_2_m <= ~(~n3v) & ((n3v & gdollar_0 & gdollar_1)
                                 | ~n3v)? (((n3v & gdollar_0 & gdollar_1)
                       | ~n3v)? ~gdollar_2: 1'b1) : (((n3v & gdollar_0 & gdollar_1)
                       | ~n3v)? 1'b0: gdollar_2);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_2_m)
  if (~clr_cntrs_l) begin
    gdollar_2 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n3v, gdollar_0, gdollar_1, gdollar_2, n3v, n3v, gdollar_0, gdollar_1, gdollar_2, n3v, gdollar_3)
  if (~clr_cntrs_l) begin
    gdollar_3_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_3_m <= ~(~n3v) & ((n3v & gdollar_0 & gdollar_1 & gdollar_2)
                                 | ~n3v)? (((n3v & gdollar_0 & gdollar_1 & gdollar_2)
                       | ~n3v)? ~gdollar_3: 1'b1) : (((n3v & gdollar_0 & gdollar_1 & gdollar_2)
                       | ~n3v)? 1'b0: gdollar_3);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_3_m)
  if (~clr_cntrs_l) begin
    gdollar_3 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_3 <= gdollar_3_m;
  end
assign n16_carry = n3v & gdollar_3 & gdollar_2 & gdollar_1 & gdollar_0;
// e2: sn74161 
always @(inc_cntrs, clr_cntrs_l, n12th_carry_l, n3v, n12th_carry_l, n3v, n12th_carry_l, n_t_11x)
  if (~clr_cntrs_l) begin
    n_t_11x_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    n_t_11x_m <= ~(~n12th_carry_l) & (n3v
                                         | ~n12th_carry_l)? ((n3v
                     | ~n12th_carry_l)? ~n_t_11x: 1'b1) : ((n3v
                     | ~n12th_carry_l)? 1'b0: n_t_11x);
  end
always @(inc_cntrs, clr_cntrs_l, n_t_11x_m)
  if (~clr_cntrs_l) begin
    n_t_11x <= 1'b0;
  end else
  if (inc_cntrs) begin
    n_t_11x <= n_t_11x_m;
  end
always @(inc_cntrs, clr_cntrs_l, n12th_carry_l, n3v, n_t_11x, n12th_carry_l, n3v, n_t_11x, n12th_carry_l, n_t_13x)
  if (~clr_cntrs_l) begin
    n_t_13x_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    n_t_13x_m <= ~(~n12th_carry_l) & ((n3v & n_t_11x)
                                         | ~n12th_carry_l)? (((n3v & n_t_11x)
                     | ~n12th_carry_l)? ~n_t_13x: 1'b1) : (((n3v & n_t_11x)
                     | ~n12th_carry_l)? 1'b0: n_t_13x);
  end
always @(inc_cntrs, clr_cntrs_l, n_t_13x_m)
  if (~clr_cntrs_l) begin
    n_t_13x <= 1'b0;
  end else
  if (inc_cntrs) begin
    n_t_13x <= n_t_13x_m;
  end
always @(inc_cntrs, clr_cntrs_l, n12th_carry_l, n3v, n_t_11x, n_t_13x, n12th_carry_l, n3v, n_t_11x, n_t_13x, n12th_carry_l, gdollar_4)
  if (~clr_cntrs_l) begin
    gdollar_4_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_4_m <= ~(~n12th_carry_l) & ((n3v & n_t_11x & n_t_13x)
                                           | ~n12th_carry_l)? (((n3v & n_t_11x & n_t_13x)
                       | ~n12th_carry_l)? ~gdollar_4: 1'b1) : (((n3v & n_t_11x & n_t_13x)
                       | ~n12th_carry_l)? 1'b0: gdollar_4);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_4_m)
  if (~clr_cntrs_l) begin
    gdollar_4 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_4 <= gdollar_4_m;
  end
always @(inc_cntrs, clr_cntrs_l, n12th_carry_l, n3v, n_t_11x, n_t_13x, gdollar_4, n12th_carry_l, n3v, n_t_11x, n_t_13x, gdollar_4, n12th_carry_l, n_t_14x)
  if (~clr_cntrs_l) begin
    n_t_14x_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    n_t_14x_m <= ~(~n12th_carry_l) & ((n3v & n_t_11x & n_t_13x & gdollar_4)
                                         | ~n12th_carry_l)? (((n3v & n_t_11x & n_t_13x & gdollar_4)
                     | ~n12th_carry_l)? ~n_t_14x: 1'b1) : (((n3v & n_t_11x & n_t_13x & gdollar_4)
                     | ~n12th_carry_l)? 1'b0: n_t_14x);
  end
always @(inc_cntrs, clr_cntrs_l, n_t_14x_m)
  if (~clr_cntrs_l) begin
    n_t_14x <= 1'b0;
  end else
  if (inc_cntrs) begin
    n_t_14x <= n_t_14x_m;
  end
// e3: sn74161 
always @(inc_cntrs, clr_cntrs_l, n3v, n12th_carry_l, n3v, n12th_carry_l, n3v, gdollar_5)
  if (~clr_cntrs_l) begin
    gdollar_5_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_5_m <= ~(~n3v) & (~n12th_carry_l
                                 | ~n3v)? ((~n12th_carry_l
                       | ~n3v)? ~gdollar_5: 1'b1) : ((~n12th_carry_l
                       | ~n3v)? 1'b0: gdollar_5);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_5_m)
  if (~clr_cntrs_l) begin
    gdollar_5 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_5 <= gdollar_5_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n12th_carry_l, gdollar_5, n3v, n12th_carry_l, gdollar_5, n3v, gdollar_6)
  if (~clr_cntrs_l) begin
    gdollar_6_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_6_m <= ~(~n3v) & ((~n12th_carry_l & gdollar_5)
                                 | ~n3v)? (((~n12th_carry_l & gdollar_5)
                       | ~n3v)? ~gdollar_6: 1'b1) : (((~n12th_carry_l & gdollar_5)
                       | ~n3v)? 1'b0: gdollar_6);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_6_m)
  if (~clr_cntrs_l) begin
    gdollar_6 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_6 <= gdollar_6_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n12th_carry_l, gdollar_5, gdollar_6, n3v, n12th_carry_l, gdollar_5, gdollar_6, n3v, gdollar_7)
  if (~clr_cntrs_l) begin
    gdollar_7_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_7_m <= ~(~n3v) & ((~n12th_carry_l & gdollar_5 & gdollar_6)
                                 | ~n3v)? (((~n12th_carry_l & gdollar_5 & gdollar_6)
                       | ~n3v)? ~gdollar_7: 1'b1) : (((~n12th_carry_l & gdollar_5 & gdollar_6)
                       | ~n3v)? 1'b0: gdollar_7);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_7_m)
  if (~clr_cntrs_l) begin
    gdollar_7 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_7 <= gdollar_7_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n12th_carry_l, gdollar_5, gdollar_6, gdollar_7, n3v, n12th_carry_l, gdollar_5, gdollar_6, gdollar_7, n3v, gdollar_8)
  if (~clr_cntrs_l) begin
    gdollar_8_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_8_m <= ~(~n3v) & ((~n12th_carry_l & gdollar_5 & gdollar_6 & gdollar_7)
                                 | ~n3v)? (((~n12th_carry_l & gdollar_5 & gdollar_6 & gdollar_7)
                       | ~n3v)? ~gdollar_8: 1'b1) : (((~n12th_carry_l & gdollar_5 & gdollar_6 & gdollar_7)
                       | ~n3v)? 1'b0: gdollar_8);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_8_m)
  if (~clr_cntrs_l) begin
    gdollar_8 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_8 <= gdollar_8_m;
  end
assign n_t_15x = ~n12th_carry_l & gdollar_8 & gdollar_7 & gdollar_6 & gdollar_5;
// e4: sn74161 
always @(inc_cntrs, clr_cntrs_l, n3v, n_t_15x, n3v, n_t_15x, n3v, gdollar_9)
  if (~clr_cntrs_l) begin
    gdollar_9_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_9_m <= ~(~n3v) & (n_t_15x
                                 | ~n3v)? ((n_t_15x
                       | ~n3v)? ~gdollar_9: 1'b1) : ((n_t_15x
                       | ~n3v)? 1'b0: gdollar_9);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_9_m)
  if (~clr_cntrs_l) begin
    gdollar_9 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_9 <= gdollar_9_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n_t_15x, gdollar_9, n3v, n_t_15x, gdollar_9, n3v, gdollar_10)
  if (~clr_cntrs_l) begin
    gdollar_10_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_10_m <= ~(~n3v) & ((n_t_15x & gdollar_9)
                                  | ~n3v)? (((n_t_15x & gdollar_9)
                        | ~n3v)? ~gdollar_10: 1'b1) : (((n_t_15x & gdollar_9)
                        | ~n3v)? 1'b0: gdollar_10);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_10_m)
  if (~clr_cntrs_l) begin
    gdollar_10 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_10 <= gdollar_10_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n_t_15x, gdollar_9, gdollar_10, n3v, n_t_15x, gdollar_9, gdollar_10, n3v, gdollar_11)
  if (~clr_cntrs_l) begin
    gdollar_11_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    gdollar_11_m <= ~(~n3v) & ((n_t_15x & gdollar_9 & gdollar_10)
                                  | ~n3v)? (((n_t_15x & gdollar_9 & gdollar_10)
                        | ~n3v)? ~gdollar_11: 1'b1) : (((n_t_15x & gdollar_9 & gdollar_10)
                        | ~n3v)? 1'b0: gdollar_11);
  end
always @(inc_cntrs, clr_cntrs_l, gdollar_11_m)
  if (~clr_cntrs_l) begin
    gdollar_11 <= 1'b0;
  end else
  if (inc_cntrs) begin
    gdollar_11 <= gdollar_11_m;
  end
always @(inc_cntrs, clr_cntrs_l, n3v, n_t_15x, gdollar_9, gdollar_10, gdollar_11, n3v, n_t_15x, gdollar_9, gdollar_10, gdollar_11, n3v, n128th_word)
  if (~clr_cntrs_l) begin
    n128th_word_m <= 1'b0;
  end else
  if (~(inc_cntrs)) begin
    n128th_word_m <= ~(~n3v) & ((n_t_15x & gdollar_9 & gdollar_10 & gdollar_11)
                                   | ~n3v)? (((n_t_15x & gdollar_9 & gdollar_10 & gdollar_11)
                         | ~n3v)? ~n128th_word: 1'b1) : (((n_t_15x & gdollar_9 & gdollar_10 & gdollar_11)
                         | ~n3v)? 1'b0: n128th_word);
  end
always @(inc_cntrs, clr_cntrs_l, n128th_word_m)
  if (~clr_cntrs_l) begin
    n128th_word <= 1'b0;
  end else
  if (inc_cntrs) begin
    n128th_word <= n128th_word_m;
  end
assign n_t_16x = n_t_15x & n128th_word & gdollar_11 & gdollar_10 & gdollar_9;
// e5: sn74161 
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, n_t_1x, n3v, n6rk3_ok, n_t_1x, n3v, n6rk3_ok, gdollar_12)
  if (~clr_all_l) begin
    gdollar_12_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_12_m <= ~n6rk3_ok & ((n_t_1x & n3v)
                                    | n6rk3_ok)? (((n_t_1x & n3v)
                        | n6rk3_ok)? ~gdollar_12: 1'b1) : (((n_t_1x & n3v)
                        | n6rk3_ok)? 1'b0: gdollar_12);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_12_m)
  if (~clr_all_l) begin
    gdollar_12 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_12 <= gdollar_12_m;
  end
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, n_t_1x, n3v, gdollar_12, n6rk3_ok, n_t_1x, n3v, gdollar_12, n6rk3_ok, gdollar_13)
  if (~clr_all_l) begin
    gdollar_13_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_13_m <= ~n6rk3_ok & ((n_t_1x & n3v & gdollar_12)
                                    | n6rk3_ok)? (((n_t_1x & n3v & gdollar_12)
                        | n6rk3_ok)? ~gdollar_13: 1'b1) : (((n_t_1x & n3v & gdollar_12)
                        | n6rk3_ok)? 1'b0: gdollar_13);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_13_m)
  if (~clr_all_l) begin
    gdollar_13 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_13 <= gdollar_13_m;
  end
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, n_t_1x, n3v, gdollar_12, gdollar_13, n6rk3_ok, n_t_1x, n3v, gdollar_12, gdollar_13, n6rk3_ok, gdollar_14)
  if (~clr_all_l) begin
    gdollar_14_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_14_m <= ~n6rk3_ok & ((n_t_1x & n3v & gdollar_12 & gdollar_13)
                                    | n6rk3_ok)? (((n_t_1x & n3v & gdollar_12 & gdollar_13)
                        | n6rk3_ok)? ~gdollar_14: 1'b1) : (((n_t_1x & n3v & gdollar_12 & gdollar_13)
                        | n6rk3_ok)? 1'b0: gdollar_14);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_14_m)
  if (~clr_all_l) begin
    gdollar_14 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_14 <= gdollar_14_m;
  end
always @(inc_brk_cntr_l, clr_all_l, half_block, n6rk3_ok, n_t_1x, n3v, gdollar_12, gdollar_13, gdollar_14, n6rk3_ok, half_block, n6rk3_ok, n_t_1x, n3v, gdollar_12, gdollar_13, gdollar_14, n6rk3_ok, gdollar_15)
  if (~clr_all_l) begin
    gdollar_15_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_15_m <= ~(~half_block & n6rk3_ok) & ((n_t_1x & n3v & gdollar_12 & gdollar_13 & gdollar_14)
                                                    | n6rk3_ok)? (~(half_block & n6rk3_ok) & ((n_t_1x & n3v & gdollar_12 & gdollar_13 & gdollar_14)
                                                   | n6rk3_ok)? ~gdollar_15: 1'b1) : (~(half_block & n6rk3_ok) & ((n_t_1x & n3v & gdollar_12 & gdollar_13 & gdollar_14)
                                                   | n6rk3_ok)? 1'b0: gdollar_15);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_15_m)
  if (~clr_all_l) begin
    gdollar_15 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_15 <= gdollar_15_m;
  end
assign b_last_brk = n3v & gdollar_15 & gdollar_14 & gdollar_13 & gdollar_12;
// e6: sn74161 
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, data_enable, n6rk3_ok, data_enable, n6rk3_ok, gdollar_16)
  if (~clr_all_l) begin
    gdollar_16_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_16_m <= ~n6rk3_ok & (data_enable
                                    | n6rk3_ok)? ((data_enable
                        | n6rk3_ok)? ~gdollar_16: 1'b1) : ((data_enable
                        | n6rk3_ok)? 1'b0: gdollar_16);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_16_m)
  if (~clr_all_l) begin
    gdollar_16 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_16 <= gdollar_16_m;
  end
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, data_enable, gdollar_16, n6rk3_ok, data_enable, gdollar_16, n6rk3_ok, gdollar_17)
  if (~clr_all_l) begin
    gdollar_17_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_17_m <= ~n6rk3_ok & ((data_enable & gdollar_16)
                                    | n6rk3_ok)? (((data_enable & gdollar_16)
                        | n6rk3_ok)? ~gdollar_17: 1'b1) : (((data_enable & gdollar_16)
                        | n6rk3_ok)? 1'b0: gdollar_17);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_17_m)
  if (~clr_all_l) begin
    gdollar_17 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_17 <= gdollar_17_m;
  end
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, data_enable, gdollar_16, gdollar_17, n6rk3_ok, data_enable, gdollar_16, gdollar_17, n6rk3_ok, gdollar_18)
  if (~clr_all_l) begin
    gdollar_18_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_18_m <= ~n6rk3_ok & ((data_enable & gdollar_16 & gdollar_17)
                                    | n6rk3_ok)? (((data_enable & gdollar_16 & gdollar_17)
                        | n6rk3_ok)? ~gdollar_18: 1'b1) : (((data_enable & gdollar_16 & gdollar_17)
                        | n6rk3_ok)? 1'b0: gdollar_18);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_18_m)
  if (~clr_all_l) begin
    gdollar_18 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_18 <= gdollar_18_m;
  end
always @(inc_brk_cntr_l, clr_all_l, n6rk3_ok, data_enable, gdollar_16, gdollar_17, gdollar_18, n6rk3_ok, data_enable, gdollar_16, gdollar_17, gdollar_18, n6rk3_ok, gdollar_19)
  if (~clr_all_l) begin
    gdollar_19_m <= 1'b0;
  end else
  if (~(~inc_brk_cntr_l)) begin
    gdollar_19_m <= ~n6rk3_ok & ((data_enable & gdollar_16 & gdollar_17 & gdollar_18)
                                    | n6rk3_ok)? (((data_enable & gdollar_16 & gdollar_17 & gdollar_18)
                        | n6rk3_ok)? ~gdollar_19: 1'b1) : (((data_enable & gdollar_16 & gdollar_17 & gdollar_18)
                        | n6rk3_ok)? 1'b0: gdollar_19);
  end
always @(inc_brk_cntr_l, clr_all_l, gdollar_19_m)
  if (~clr_all_l) begin
    gdollar_19 <= 1'b0;
  end else
  if (~inc_brk_cntr_l) begin
    gdollar_19 <= gdollar_19_m;
  end
assign n_t_1x = data_enable & gdollar_19 & gdollar_18 & gdollar_17 & gdollar_16;
// e7: sn74h04 
assign rd_clk1 = ~rd_clk1_l;
assign n_t_59x = ~rd_clk1_l;
assign n_t_56x = ~read_clk;
// e8: sn7400 
assign brk_in_clk = ~(~(~read_l & data_state));
assign brk_enab_clk = ~(~brk_in_clk & ~write);
assign rd_sync_bit_l = ~(data_in & rd_clk2);
assign rd_clk1_l = ~(n_t_57x & read_clk);
// e9: sn7404 
// e10: sn74h10 
assign inc_cntrs = ~(~rd_clk2 & ~b_wrt_clk & hi_main_shft_l);
assign clr_cntrs = ~(n_t_10x & clr_all_l & data_clr_l);
assign n12th_carry_l = ~(n_t_11x & n_t_13x & n_t_14x);
// e11: sn74h04 
assign clr_cntrs_l = ~clr_cntrs;
assign last_word_pl = ~last_word_pl_l;
assign n_t_6x = n_t_2x;
// e12: sn7400 
assign n_t_10x = ~(~n_t_2x & n_t_7x);
assign n_t_19x = ~(inc_cntrs & ~n12th_carry_l);
assign last_word_pl_l = ~(last_word & ~n12th_carry_l);
assign n16th_bit_l = ~(inc_cntrs & n16_carry);
// e13: sn7402 
assign n_t_2x = ~(header_e
                   | state_enab_b);
assign inc_brk_cntr_l = ~(n_t_3x
                           | btp2);
assign n_t_3x = ~(btp3_ok
                   | ~n6rk3_ok);
assign n12th_bit_ok = ~(n_t_19x
                         | ~inh_12th_bit_l);
// e14: sn7400 
assign state_enab_b = ~(~crc_state & ~header_c);
assign n_t_17x = ~(half_block & n128th_word);
assign rd_shft_db_l = ~(rd_clk1 & data_state);
assign shft_wrt_buff_l = ~(inh_12th_bit_l & n_t_42x);
// e15: sn7474 
always @(rd_clk2, read_l, read_data_in, 1'b0)
  if (read_l) begin
    data_in_m <= 1'b0;
  end else
  if (read_data_in) begin
    data_in_m <= 1'b1;
  end else
  if (~(~rd_clk2)) begin
    data_in_m <= 1'b0;
  end
always @(rd_clk2, read_l, read_data_in, data_in_m)
  if (read_l) begin
    data_in <= 1'b0;
  end else
  if (read_data_in) begin
    data_in <= 1'b1;
  end else
  if (~rd_clk2) begin
    data_in <= data_in_m;
  end
assign data_in_l = ~data_in;
always @(n_t_18x, n3v, clr_cntrs_l, n_t_17x)
  if (~n3v) begin
    inh_12th_bit_l_m <= 1'b0;
  end else
  if (~clr_cntrs_l) begin
    inh_12th_bit_l_m <= 1'b1;
  end else
  if (~(n_t_18x)) begin
    inh_12th_bit_l_m <= n_t_17x;
  end
always @(n_t_18x, n3v, clr_cntrs_l, inh_12th_bit_l_m)
  if (~n3v) begin
    inh_12th_bit_l <= 1'b0;
  end else
  if (~clr_cntrs_l) begin
    inh_12th_bit_l <= 1'b1;
  end else
  if (n_t_18x) begin
    inh_12th_bit_l <= inh_12th_bit_l_m;
  end
// e16: sn7408 
assign disk_ok = (rdy_s_r_w & dsk_acknowledge_l);
assign n_t_54x = (n_t_51x & clr_all_l);
assign data_clk = (n_t_29x & n_t_31x);
assign rd_clk2 = (rd_clk1_l & n_t_60x);
// e17: sn7400 
assign n_t_44x = ~(data_clk & data_state);
assign data_clk_ok = ~(lo_main_shft_l & n_t_43x);
assign n_t_43x = ~(inh_12th_bit_l & ~n_t_44x);
// e18: sn7474 
always @(n_t_67x, clr_states, go, 1'b0)
  if (clr_states) begin
    idle_l_m <= 1'b0;
  end else
  if (go) begin
    idle_l_m <= 1'b1;
  end else
  if (~(~n_t_67x)) begin
    idle_l_m <= 1'b0;
  end
always @(n_t_67x, clr_states, go, idle_l_m)
  if (clr_states) begin
    idle_l <= 1'b0;
  end else
  if (go) begin
    idle_l <= 1'b1;
  end else
  if (~n_t_67x) begin
    idle_l <= idle_l_m;
  end
assign idle = ~idle_l;
always @(clr_drive_cmd_l, clr_strobe_l, n3v, file_rdy)
  if (~clr_strobe_l) begin
    restore_m <= 1'b0;
  end else
  if (~n3v) begin
    restore_m <= 1'b1;
  end else
  if (~(~clr_drive_cmd_l)) begin
    restore_m <= file_rdy;
  end
always @(clr_drive_cmd_l, clr_strobe_l, n3v, restore_m)
  if (~clr_strobe_l) begin
    restore <= 1'b0;
  end else
  if (~n3v) begin
    restore <= 1'b1;
  end else
  if (~clr_drive_cmd_l) begin
    restore <= restore_m;
  end
// e19: sn7474 
always @(disk_ok, n_t_75x, n3v, check_header_cmd_l)
  if (~n_t_75x) begin
    header_a_m <= 1'b0;
  end else
  if (~n3v) begin
    header_a_m <= 1'b1;
  end else
  if (~(disk_ok)) begin
    header_a_m <= ~check_header_cmd_l;
  end
always @(disk_ok, n_t_75x, n3v, header_a_m)
  if (~n_t_75x) begin
    header_a <= 1'b0;
  end else
  if (~n3v) begin
    header_a <= 1'b1;
  end else
  if (disk_ok) begin
    header_a <= header_a_m;
  end
always @(go, clr_strobe_l, n3v, file_rdy)
  if (~clr_strobe_l) begin
    strobe_m <= 1'b0;
  end else
  if (~n3v) begin
    strobe_m <= 1'b1;
  end else
  if (~(go)) begin
    strobe_m <= file_rdy;
  end
always @(go, clr_strobe_l, n3v, strobe_m)
  if (~clr_strobe_l) begin
    strobe <= 1'b0;
  end else
  if (~n3v) begin
    strobe <= 1'b1;
  end else
  if (go) begin
    strobe <= strobe_m;
  end
// e20: sn7474 
always @(sector_mk, n_t_77x, n3v, header_a)
  if (~n_t_77x) begin
    header_b_m <= 1'b0;
  end else
  if (~n3v) begin
    header_b_m <= 1'b1;
  end else
  if (~(sector_mk)) begin
    header_b_m <= header_a;
  end
always @(sector_mk, n_t_77x, n3v, header_b_m)
  if (~n_t_77x) begin
    header_b <= 1'b0;
  end else
  if (~n3v) begin
    header_b <= 1'b1;
  end else
  if (sector_mk) begin
    header_b <= header_b_m;
  end
always @(rd_sync_bit_l, n_t_78x, header_c, header_b)
  if (~n_t_78x) begin
    header_c_m <= 1'b0;
  end else
  if (header_c) begin
    header_c_m <= 1'b1;
  end else
  if (~(rd_sync_bit_l)) begin
    header_c_m <= header_b;
  end
always @(rd_sync_bit_l, n_t_78x, header_c, header_c_m)
  if (~n_t_78x) begin
    header_c <= 1'b0;
  end else
  if (header_c) begin
    header_c <= 1'b1;
  end else
  if (rd_sync_bit_l) begin
    header_c <= header_c_m;
  end
// e21: sn7474 
always @(last_word_pl_l, n_t_72x, crc_state, data_state)
  if (~n_t_72x) begin
    crc_state_m <= 1'b0;
  end else
  if (crc_state) begin
    crc_state_m <= 1'b1;
  end else
  if (~(last_word_pl_l)) begin
    crc_state_m <= data_state;
  end
always @(last_word_pl_l, n_t_72x, crc_state, crc_state_m)
  if (~n_t_72x) begin
    crc_state <= 1'b0;
  end else
  if (crc_state) begin
    crc_state <= 1'b1;
  end else
  if (last_word_pl_l) begin
    crc_state <= crc_state_m;
  end
always @(n16th_bit_l, idle_l, n3v, crc_state)
  if (~idle_l) begin
    end_state_m <= 1'b0;
  end else
  if (~n3v) begin
    end_state_m <= 1'b1;
  end else
  if (~(n16th_bit_l)) begin
    end_state_m <= crc_state;
  end
always @(n16th_bit_l, idle_l, n3v, end_state_m)
  if (~idle_l) begin
    end_state <= 1'b0;
  end else
  if (~n3v) begin
    end_state <= 1'b1;
  end else
  if (n16th_bit_l) begin
    end_state <= end_state_m;
  end
assign end_state_l = ~end_state;
// e22: sn7474 
always @(n16th_bit_l, n_t_71x, data_state_l, header_e)
  if (~n_t_71x) begin
    data_state_m <= 1'b0;
  end else
  if (~data_state_l) begin
    data_state_m <= 1'b1;
  end else
  if (~(n16th_bit_l)) begin
    data_state_m <= header_e;
  end
always @(n16th_bit_l, n_t_71x, data_state_l, data_state_m)
  if (~n_t_71x) begin
    data_state <= 1'b0;
  end else
  if (~data_state_l) begin
    data_state <= 1'b1;
  end else
  if (n16th_bit_l) begin
    data_state <= data_state_m;
  end
assign data_state_l = ~data_state;
always @(n_t_80x, n_t_79x, header_e, header_d)
  if (~n_t_79x) begin
    header_e_m <= 1'b0;
  end else
  if (header_e) begin
    header_e_m <= 1'b1;
  end else
  if (~(n_t_80x)) begin
    header_e_m <= header_d;
  end
always @(n_t_80x, n_t_79x, header_e, header_e_m)
  if (~n_t_79x) begin
    header_e <= 1'b0;
  end else
  if (header_e) begin
    header_e <= 1'b1;
  end else
  if (n_t_80x) begin
    header_e <= header_e_m;
  end
// e23: sn7402 
assign n_t_72x = ~(clr_states
                    | end_state);
assign state_enab_a_l = ~(data_state
                           | state_enab_b);
assign n_t_71x = ~(clr_states
                    | crc_state);
assign n_t_79x = ~(data_state
                    | clr_states);
// e24: sn7474 
always @(disk_ok, n_t_70x, set_sector_seek_l, not_chk_header_cmd)
  if (~n_t_70x) begin
    sector_seek_m <= 1'b0;
  end else
  if (~set_sector_seek_l) begin
    sector_seek_m <= 1'b1;
  end else
  if (~(disk_ok)) begin
    sector_seek_m <= not_chk_header_cmd;
  end
always @(disk_ok, n_t_70x, set_sector_seek_l, sector_seek_m)
  if (~n_t_70x) begin
    sector_seek <= 1'b0;
  end else
  if (~set_sector_seek_l) begin
    sector_seek <= 1'b1;
  end else
  if (disk_ok) begin
    sector_seek <= sector_seek_m;
  end
assign sector_seek_l = ~sector_seek;
always @(sector_mk_l, n_t_81x, n3v, sector_eq)
  if (~n_t_81x) begin
    header_d_m <= 1'b0;
  end else
  if (~n3v) begin
    header_d_m <= 1'b1;
  end else
  if (~(sector_mk_l)) begin
    header_d_m <= sector_eq;
  end
always @(sector_mk_l, n_t_81x, n3v, header_d_m)
  if (~n_t_81x) begin
    header_d <= 1'b0;
  end else
  if (~n3v) begin
    header_d <= 1'b1;
  end else
  if (sector_mk_l) begin
    header_d <= header_d_m;
  end
// e25: sn7400 
assign n_t_67x = ~(n_t_68x & erase_dly_l);
assign n_t_62x = ~(error_clr_l & clr_all_l);
assign n_t_68x = ~(strobe & seek_only);
assign seek_only = ~(seek_l & ~restore);
// e26: sn7402 
assign n_t_75x = ~(idle
                    | header_b);
assign n_t_77x = ~(clr_states
                    | header_c);
assign clr_strobe_l = ~(clr_states
                         | ~dsk_acknowledge_l);
assign clr_states = ~(~(n_t_62x
                         | n_t_63x));
// e27: sn7400 
assign n_t_63x = ~(n_t_58x & set_idle_pl_l);
assign set_sector_seek_l = ~(header_c & ~n16th_bit_l);
assign set_header_e_l = ~(b_wrt_clk & wrt_sync_bit);
assign wrt_clk_data = ~(wrt_clk_l & data_out_pl_l);
// e28: sn7452 
assign crc_data = data_in & data_state
                   | data_state & rk_data11 & write
                   | header_c & data_in
                   | crc_state & data_in;
// e29: sn7402 
assign n_t_70x = ~(idle
                    | header_d);
assign n_t_81x = ~(clr_states
                    | header_e);
assign n_t_78x = ~(idle
                    | sector_seek);
assign b_wrt_clk = ~(n_t_36x
                      | wrt_clk_l);
// e30: sn7402 
assign n_t_51x = ~(sector_seek
                    | end_state);
assign n_t_46x = ~(n_t_45x
                    | header_b);
assign rd_shft_crc = ~(rd_clk1_l
                        | state_enab_a_l);
assign n_t_45x = ~(wrt_cmd
                    | ~header_d);
// e31: sn74155 
assign sk_chk_wrt_l = ~(~function01 & ~function02 & function00);
assign sk_wrt_l = ~(~function01 & function02 & function00);
assign sk_chk_rd_l = ~(~function01 & function02 & ~function00);
assign sk_rd_l = ~(~function01 & ~function02 & ~function00);
assign wrt_lock_out_l = ~(function01 & function02 & ~function00);
assign seek_l = ~(function01 & ~function02 & ~function00);
// e32: sn7408 
assign n_t_80x = (set_header_e_l & rd_sync_bit_l);
assign ld_disk_addrs = (btp3 & n_t_65x);
assign check_header_cmd_l = (sk_chk_rd_l & sk_chk_wrt_l);
assign n_t_65x = (n6rk3_ok & wrt_lock_out_l);
// e33: sn7400 
assign n_t_35x = ~(crc16 & n_t_37x);
assign n_t_37x = ~(~header_e & ~crc_state);
assign n_t_32x = ~(rk_data11 & data_state);
assign wrt_cmd = ~(sk_chk_wrt_l & sk_wrt_l);
// e34: sn7410 
assign n_t_39x = ~(n_t_32x & n_t_35x & ~wrt_sync_bit);
assign data_out_pl_l = ~(n_t_31x & n_t_29x & n_t_39x);
assign not_chk_header_cmd = ~(sk_rd_l & sk_wrt_l & sk_wrt_l);
// e35: sn7404 
assign sector_mk_l = ~sector_mk;
assign b_idle = ~idle_l;
// e36: sn7404 
assign wrt_cmd_l = ~wrt_cmd;
assign n_t_40x = ~wrt_clk_l;
// e37: sn7474 
always @(b_wrt_clk, header_d, n3v, sync_dly_l)
  if (~header_d) begin
    wrt_sync_bit_m <= 1'b0;
  end else
  if (~n3v) begin
    wrt_sync_bit_m <= 1'b1;
  end else
  if (~(~b_wrt_clk)) begin
    wrt_sync_bit_m <= sync_dly_l;
  end
always @(b_wrt_clk, header_d, n3v, wrt_sync_bit_m)
  if (~header_d) begin
    wrt_sync_bit <= 1'b0;
  end else
  if (~n3v) begin
    wrt_sync_bit <= 1'b1;
  end else
  if (~b_wrt_clk) begin
    wrt_sync_bit <= wrt_sync_bit_m;
  end
always @(read_dly_l, n3v, n_t_54x, n_t_46x)
  if (~n3v) begin
    read_l_m <= 1'b0;
  end else
  if (~n_t_54x) begin
    read_l_m <= 1'b1;
  end else
  if (~(read_dly_l)) begin
    read_l_m <= n_t_46x;
  end
always @(read_dly_l, n3v, n_t_54x, read_l_m)
  if (~n3v) begin
    read_l <= 1'b0;
  end else
  if (~n_t_54x) begin
    read_l <= 1'b1;
  end else
  if (read_dly_l) begin
    read_l <= read_l_m;
  end
// e39: sn7410 
assign n_t_69x = ~(ld_disk_addrs & rdy_s_r_w & main_l);
assign n_t_58x = ~(wrt_cmd_l & last_brk & end_state);
assign wrt_clk_l = ~(write & n_t_29x & ~n_t_31x);
// e40: sn7402 
assign wrt_shft_crc = ~(n_t_38x
                         | ~b_wrt_clk);
assign n_t_42x = ~(data_state_l
                    | ~b_wrt_clk);
assign n_t_38x = ~(n_t_37x
                    | data_state);
assign shift_crc_l = ~(rd_shft_crc
                        | wrt_shft_crc);
// e41: sn7474 
always @(n_t_29x, write, n3v, n_t_31x)
  if (~write) begin
    n_t_31x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_31x_m <= 1'b1;
  end else
  if (~(~n_t_29x)) begin
    n_t_31x_m <= ~n_t_31x;
  end
always @(n_t_29x, write, n3v, n_t_31x_m)
  if (~write) begin
    n_t_31x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_31x <= 1'b1;
  end else
  if (~n_t_29x) begin
    n_t_31x <= n_t_31x_m;
  end
always @(header_d, idle_l, n3v, wrt_cmd)
  if (~idle_l) begin
    write_m <= 1'b0;
  end else
  if (~n3v) begin
    write_m <= 1'b1;
  end else
  if (~(header_d)) begin
    write_m <= wrt_cmd;
  end
always @(header_d, idle_l, n3v, write_m)
  if (~idle_l) begin
    write <= 1'b0;
  end else
  if (~n3v) begin
    write <= 1'b1;
  end else
  if (header_d) begin
    write <= write_m;
  end
// e42: sp380n 
// e44: ds75452n 
// dsk_wrt_clk_data_l = !(!wrt_clk_data); 
// e45: sn7400 
assign n_t_28x = ~(~n_t_20x & inside_in_l);
assign n_t_27x = ~(n_t_28x & outside_clk_l);
assign n_t_29x = ~(n_t_27x & write);
assign go = ~(n_t_69x & clr_drive_cmd_l);
// e46: sn7496 
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata7, 1'b0)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    top_surf_m <= 1'b0;
  end else
  if (ld_disk_addrs & bdata7) begin
    top_surf_m <= 1'b1;
  end else
  if (~(shft_surf)) begin
    top_surf_m <= 1'b0;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata7, top_surf_m)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    top_surf <= 1'b0;
  end else
  if (ld_disk_addrs & bdata7) begin
    top_surf <= 1'b1;
  end else
  if (shft_surf) begin
    top_surf <= top_surf_m;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata8, top_surf)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs8_m <= 1'b0;
  end else
  if (ld_disk_addrs & bdata8) begin
    sector_addrs8_m <= 1'b1;
  end else
  if (~(shft_surf)) begin
    sector_addrs8_m <= top_surf;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata8, sector_addrs8_m)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs8 <= 1'b0;
  end else
  if (ld_disk_addrs & bdata8) begin
    sector_addrs8 <= 1'b1;
  end else
  if (shft_surf) begin
    sector_addrs8 <= sector_addrs8_m;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata9, sector_addrs8)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs4_m <= 1'b0;
  end else
  if (ld_disk_addrs & bdata9) begin
    sector_addrs4_m <= 1'b1;
  end else
  if (~(shft_surf)) begin
    sector_addrs4_m <= sector_addrs8;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata9, sector_addrs4_m)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs4 <= 1'b0;
  end else
  if (ld_disk_addrs & bdata9) begin
    sector_addrs4 <= 1'b1;
  end else
  if (shft_surf) begin
    sector_addrs4 <= sector_addrs4_m;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata10, sector_addrs4)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs2_m <= 1'b0;
  end else
  if (ld_disk_addrs & bdata10) begin
    sector_addrs2_m <= 1'b1;
  end else
  if (~(shft_surf)) begin
    sector_addrs2_m <= sector_addrs4;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata10, sector_addrs2_m)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs2 <= 1'b0;
  end else
  if (ld_disk_addrs & bdata10) begin
    sector_addrs2 <= 1'b1;
  end else
  if (shft_surf) begin
    sector_addrs2 <= sector_addrs2_m;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata11, sector_addrs2)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs1_m <= 1'b0;
  end else
  if (ld_disk_addrs & bdata11) begin
    sector_addrs1_m <= 1'b1;
  end else
  if (~(shft_surf)) begin
    sector_addrs1_m <= sector_addrs2;
  end
always @(shft_surf, ld_disk_addrs, clr_sector_ad_l, ld_disk_addrs, bdata11, sector_addrs1_m)
  if (~ld_disk_addrs & ~clr_sector_ad_l) begin
    sector_addrs1 <= 1'b0;
  end else
  if (ld_disk_addrs & bdata11) begin
    sector_addrs1 <= 1'b1;
  end else
  if (shft_surf) begin
    sector_addrs1 <= sector_addrs1_m;
  end
// e47: sn7485 
assign gdollar_20 = sector_addrs8 & dsk_sec8_l
                     | ~sector_addrs8 & ~dsk_sec8_l;
assign gdollar_21 = sector_addrs4 & dsk_sec4_l
                     | ~sector_addrs4 & ~dsk_sec4_l;
assign gdollar_22 = sector_addrs2 & dsk_sec2_l
                     | ~sector_addrs2 & ~dsk_sec2_l;
assign gdollar_23 = sector_addrs1 & dsk_sec1_l
                     | ~sector_addrs1 & ~dsk_sec1_l;
assign sector_eq = sector_seek & ~gdollar_20 & ~gdollar_21 & ~gdollar_22 & ~gdollar_23;
// e48: ds75452n 
// dsk_strobe_l = !(!strobe); 
// dsk_head_sel1_l = !(!top_surf); 
// e49: ds75452n 
// dsk_read_l = !(read_l); 
// dsk_restore_l = !(!restore); 
// e50: ds75452n 
// dsk_wrt_erase_gate_l = !(!write); 
// dsk_wrt_protect_l = !(!(n6rk3_ok & !wrt_lock_out_l)); 
// e51: sp380n 
assign n_t_25x = ~n_t_24x;
assign n_t_85x = ~(wrt_cmd_l
                    | dsk_wrt_status_l);
assign n_t_20x = ~n_t_21x;
// e52: sp380n 
assign bdata9 = ~(data9_l
                   | data_enab_l);
assign bdata8 = ~(data8_l
                   | data_enab_l);
assign bdata10 = ~(data10_l
                    | data_enab_l);
assign bdata11 = ~(data11_l
                    | data_enab_l);
// e53: sp380n 
assign drv_revo = ~(dsk_index_mk_l
                     | b_idle);
// e54: sp380n 
assign read_data_in = ~(read_l
                         | dsk_data_in_l);
assign file_rdy = ~(dsk_file_rdy_l
                     | n_t_85x);
assign read_clk = ~(dsk_rd_clk_l
                     | read_l);
assign sector_mk = ~(b_idle
                      | dsk_sector_mk_l);
// open collector 'wire-or's 
assign dsk_head_sel1_l = (~top_surf)? 1'b0: 1'bz;
assign dsk_read_l = read_l? ~read_l: 1'bz;
assign dsk_restore_l = (~restore)? 1'b0: 1'bz;
assign dsk_strobe_l = (~strobe)? 1'b0: 1'bz;
assign dsk_wrt_clk_data_l = (~wrt_clk_data)? 1'b0: 1'bz;
assign dsk_wrt_erase_gate_l = (~write)? 1'b0: 1'bz;
assign dsk_wrt_protect_l = (~(n6rk3_ok & ~wrt_lock_out_l))? 1'b0: 1'bz;
endmodule