// this file is generated by topld.pl // please don't edit it. // input pins // output pins // internal nodes // code nodes // equations // c1: cpol_use // c2: cpol_use // c3: c_us // c4: c_us // c5: c_us // c6: c_us // c7: c_us // c8: cpol_use // c9: cpol_use // c10: cpol_use // c11: cpol_use // c12: c_us // c13: c_us // c14: c_us // c15: c_us // c16: c_us // c17: c_us // c18: c_us // c19: c_us // c20: cpol_use // e1: sn7400 module m715f (n2_8v, n_t_13x, n_t_16x, n_t_18x, n_t_19x, n_t_43x, be, bh, catch, clk_l, clock_1, enable_l, feed_sw_l, inh_strobe_l, motor_on_ch, n15v, n_t_14x, n_t_29x, n_t_35x, n_t_36x, n_t_38x, n_t_39x, n_t_42x, n_t_9x, run_l, shift, shift_l, stop_complete, stop_delay, strobe, tp_av, tp_bm); output n2_8v; input n_t_13x; input n_t_16x; input n_t_18x; input n_t_19x; input n_t_43x; output be; output bh; input catch; inout clk_l; output clock_1; input enable_l; input feed_sw_l; output inh_strobe_l; input motor_on_ch; output n15v; output n_t_14x; output n_t_29x; output n_t_35x; output n_t_36x; output n_t_38x; output n_t_39x; output n_t_42x; inout n_t_9x; input run_l; output shift; inout shift_l; output stop_complete; input stop_delay; input strobe; input tp_av; inout tp_bm; wire n_t_11x; wire n_t_12x; wire n_t_1x; wire n_t_2x; wire n_t_3x; wire n_t_5x; wire n_t_6x; wire n_t_8x; assign n_t_6x = ~(n_t_2x & stop_delay); assign shift = ~(shift_l & n_t_3x); // e3: sn7400 assign shift_l = ~(~n_t_11x & n_t_9x); assign clk_l = ~(n_t_19x & ~tp_av); assign n_t_12x = ~(~tp_av & n_t_18x); assign n_t_11x = ~(n_t_12x & n_t_13x); // e4: sn7404 assign n_t_14x = ~n_t_12x; assign clock_1 = ~n_t_16x; assign n_t_29x = ~n_t_9x; assign n_t_9x = ~enable_l; // e6: sn7400 assign n_t_1x = ~(n_t_3x & n_t_2x); assign n_t_2x = ~(n_t_1x & run_l); assign stop_complete = ~(feed_sw_l & n_t_6x); assign n_t_3x = ~(catch & n_t_43x); // e7: sn7402 assign tp_bm = ~(n_t_8x | n_t_5x); assign n_t_8x = ~(clk_l | motor_on_ch); assign n_t_5x = ~(tp_bm | strobe); // open collector 'wire-or's endmodule