/* This file is generated by topld.pl!! */
/* Please don't edit it. */

Name     M8300B ;
PartNo   cpld ;
Date     XX/XX/XXXX ;
Revision 01 ;
Designer  ;
Company   ;
Assembly None ;
Location E1 ;
Device   f1508isptqfp100;

$DEFINE OPTIMIZE

$UNDEF  OPTIMIZE

/* Input Pins */
pin = ac2bus_l;
pin = ac_load_l;
pin = adlk_l;
pin = al2mq_ena_l;
pin = carry_in_l;
pin = cpma_load_l;
pin = data_f;
pin = data_t;
pin = en0;
pin = en1;
pin = en2;
pin = left_l;
pin = mac_l;
pin = mb_load_l;
pin = mq2bus_l;
pin = mq_data_l;
pin = mq_load_l;
pin = pagez;
pin = pc_load_l;
pin = right_l;
pin = shl_ena_l;
pin = twice_l;

/* Output Pins */
pin = ac00;
pin = ac01;
pin = ac02;
pin = ac03;
pin = ac04_11eq0_l;
pin = ad00_l;
pin = ad01_l;
pin = ad10_l;
pin = ad11_l;
pin = carry_out_l;
pin = data00;
pin = data01;
pin = data02;
pin = data03;
pin = data04;
pin = data05;
pin = data06;
pin = data07;
pin = data08;
pin = data09;
pin = data10;
pin = data11;
pin = init;
pin = ma00_l;
pin = ma01_l;
pin = ma02_l;
pin = ma03_l;
pin = ma04_l;
pin = ma05_l;
pin = ma06_l;
pin = ma07_l;
pin = ma08_l;
pin = ma09_l;
pin = ma10_l;
pin = ma11_l;
pin = md00_l;
pin = md01_l;
pin = md02_l;
pin = md03_l;
pin = md04_l;
pin = md05_l;
pin = md06_l;
pin = md07_l;
pin = md08_l;
pin = md09_l;
pin = md10_l;
pin = md11_l;
pin = md_dir_l;
pin = mq00_03eq0_l;
pin = mq00_l;
pin = mq04_11eq0_l;
pin = mq10_l;
pin = mq11_l;
node mb02;
node mb03;
node mb01;
node mb00;
node cpma3;
node cpma2;
node cpma0;
node cpma1;
node mq01_l;
node mq02_l;
node mq03_l;
node pc03_l;
node pc02_l;
node pc00_l;
node pc01_l;
node mb06;
node mb07;
node mb05;
node mb04;
node cpma7;
node cpma6;
node cpma4;
node cpma5;
node ac06;
node ac07;
node ac05;
node ac04;
node mq04_l;
node mq05_l;
node mq06_l;
node mq07_l;
node pc07_l;
node pc06_l;
node pc04_l;
node pc05_l;
node cpma10;
node cpma11;
node cpma8;
node cpma9;
node pc08_l;
node pc09_l;
node pc10_l;
node pc11_l;
node mb10;
node mb11;
node mb09;
node mb08;
node mq08_l;
node mq09_l;
node ac10;
node ac11;
node ac09;
node ac08;

/* Internal nodes */
$IFNDEF OPTIMIZE
node a00_l;
node a01_l;
node a02_l;
node a03_l;
node a04_l;
node a05_l;
node a06_l;
node a07_l;
node a08_l;
node a09_l;
node a10_l;
node a11_l;
node ad02_l;
node ad03_l;
node ad04_l;
node ad05_l;
node ad06_l;
node ad07_l;
node ad08_l;
node ad09_l;
node and00_l;
node and01_l;
node and02_l;
node and03_l;
node and04_l;
node and05_l;
node and06_l;
node and07_l;
node and08_l;
node and09_l;
node and10_l;
node and11_l;
node b00_l;
node b01_l;
node b02_l;
node b03_l;
node b04_l;
node b05_l;
node b06_l;
node b07_l;
node b08_l;
node b09_l;
node b10_l;
node b11_l;
node b_init_l;
node carry04_l;
node carry08_l;
node left;
node n3a;
node n3b;
node n3c;
node n_t_10x;
node n_t_11x;
node n_t_12x;
node n_t_13x;
node n_t_18x;
node n_t_19x;
node n_t_1x;
node n_t_20x;
node n_t_21x;
node n_t_22x;
node n_t_23x;
node n_t_24x;
node n_t_28x;
node n_t_29x;
node n_t_2x;
node n_t_30x;
node n_t_31x;
node n_t_36x;
node n_t_37x;
node n_t_38x;
node n_t_39x;
node n_t_3x;
node n_t_40x;
node n_t_42x;
node n_t_43x;
node n_t_4x;
node n_t_5x;
node n_t_6x;
node n_t_7x;
node n_t_8x;
node n_t_9x;
node pg00_l;
node pg01_l;
node pg02_l;
node pg03_l;
node pg04_l;
node regbus00;
node regbus00_l;
node regbus01;
node regbus01_l;
node regbus02;
node regbus02_l;
node regbus03;
node regbus03_l;
node regbus04;
node regbus04_l;
node regbus05;
node regbus05_l;
node regbus06;
node regbus06_l;
node regbus07;
node regbus07_l;
node regbus08;
node regbus08_l;
node regbus09;
node regbus09_l;
node regbus10;
node regbus10_l;
node regbus11;
node regbus11_l;
node right;
node right2;
node twice;
$ENDIF

/* Code nodes */

/* Equations */

/* c1: cpol_use */

/* c2: cpol_use */

/* c3: cpol_use */

/* c4: c_us */

/* c5: c_us */

/* c6: c_us */

/* c7: c_us */

/* c8: c_us */

/* c9: c_us */

/* c10: c_us */

/* c11: c_us */

/* c12: c_us */

/* c13: c_us */

/* c14: c_us */

/* c15: c_us */

/* e1: n8881n */
/* ma03_l = !(cpma3 & n_t_1x); */
/* ma02_l = !(n_t_1x & cpma2); */
/* ma00_l = !(n_t_1x & cpma0); */
/* ma01_l = !(n_t_1x & cpma1); */

/* e2: n8881n */
/* md03_l = !(mb03 & n_t_12x); */
/* md02_l = !(n_t_12x & mb02); */
/* md00_l = !(n_t_12x & mb00); */
/* md01_l = !(n_t_12x & mb01); */

/* e3: dec8271 */
mb02.ar = !n3b;
mb02.d = regbus02 & n3b
       # mb02 & !n3b;
mb02.ck = !mb_load_l;
mb03.ar = !n3b;
mb03.d = regbus03 & n3b
       # mb03 & !n3b;
mb03.ck = !mb_load_l;
mb01.ar = !n3b;
mb01.d = regbus01 & n3b
       # mb01 & !n3b;
mb01.ck = !mb_load_l;
mb00.ar = !n3b;
mb00.d = regbus00 & n3b
       # mb00 & !n3b;
mb00.ck = !mb_load_l;

/* e4: dec8271 */
cpma3.ar = !n3a;
cpma3.d = regbus03 & n3a
        # cpma3 & !n3a;
cpma3.ck = !cpma_load_l;
cpma2.ar = !n3a;
cpma2.d = regbus02 & n3a
        # cpma2 & !n3a;
cpma2.ck = !cpma_load_l;
cpma0.ar = !n3a;
cpma0.d = regbus00 & n3a
        # cpma0 & !n3a;
cpma0.ck = !cpma_load_l;
cpma1.ar = !n3a;
cpma1.d = regbus01 & n3a
        # cpma1 & !n3a;
cpma1.ck = !cpma_load_l;

/* e5: mc8266 */
pg02_l = !(!ma02_l & !pagez
         #  & pagez & !pagez);
pg03_l = !(!ma03_l & !pagez
         #  & pagez & !pagez);
pg01_l = !(!ma01_l & !pagez
         # pagez & !pagez);
pg00_l = !(!ma00_l & !pagez
         # pagez & !pagez);

/* e6: sn74151 */
regbus00_l = ad00_l & !'b'0 & !right & !left & !twice
    # ad06_l  & !'b'0 & !right & !left &  twice
    # ad01_l  & !'b'0 & !right &  left & !twice
    # ad02_l  & !'b'0 & !right &  left &  twice
    # adlk_l & !'b'0 &  right & !left & !twice
    # ad11_l & !'b'0 &  right & !left &  twice
    # and00_l & !'b'0 &  right &  left & !twice
    # pg00_l & !'b'0 &  right &  left &  twice;
regbus00 = !regbus00_l;

/* e7: dec8235 */
/* data03 = !(!mq03_l & !mq2bus_l
       # ac03 & !ac2bus_l); */
/* data02 = !(!mq02_l & !mq2bus_l
       # ac02 & !ac2bus_l); */
/* data00 = !(!mq00_l & !mq2bus_l
       # ac00 & !ac2bus_l); */
/* data01 = !(!mq01_l & !mq2bus_l
       # ac01 & !ac2bus_l); */

/* e8: dec8271 */
ac02.ar = !b_init_l;
ac02.d = regbus02 & n3b
       # ac02 & !n3b;
ac02.ck = !ac_load_l;
ac03.ar = !b_init_l;
ac03.d = regbus03 & n3b
       # ac03 & !n3b;
ac03.ck = !ac_load_l;
ac01.ar = !b_init_l;
ac01.d = regbus01 & n3b
       # ac01 & !n3b;
ac01.ck = !ac_load_l;
ac00.ar = !b_init_l;
ac00.d = regbus00 & n3b
       # ac00 & !n3b;
ac00.ck = !ac_load_l;

/* e9: sn74153 */
n_t_9x = !'b'0 & ( !pad{1}&!en2&pc00_l
                     # !pad{1}& en2&md00_l
                     #  pad{1}&!en2&mq00_l
                     #  pad{1}& en2&ma00_l);
n_t_8x = !'b'0 & ( !pad{1}&!en2&pc01_l
                      # !pad{1}& en2&md01_l
                      #  pad{1}&!en2&mq01_l
                      #  pad{1}& en2&ma01_l);

/* e10: sn7487 */
b02_l = data_t & !data_f
      # data_f & data02
      # !data_f & !data02;
b03_l = data_t & !data_f
      # data_f & data03
      # !data_f & !data03;
b01_l = data_t & !data_f
      # data_f & data01
      # !data_f & !data01;
b00_l = data_t & !data_f
      # data_f & data00
      # !data_f & !data00;

/* e11: sn74151 */
regbus01_l = ad01_l & !'b'0 & !right & !left & !twice
    # ad07_l  & !'b'0 & !right & !left &  twice
    # ad02_l  & !'b'0 & !right &  left & !twice
    # ad03_l  & !'b'0 & !right &  left &  twice
    # ad00_l & !'b'0 &  right & !left & !twice
    # adlk_l & !'b'0 &  right & !left &  twice
    # and01_l & !'b'0 &  right &  left & !twice
    # pg01_l & !'b'0 &  right &  left &  twice;
regbus01 = !regbus01_l;

/* e12: mc8266 */
n_t_2x = !(!mq02_l & !shl_ena_l
         # ac01 & shl_ena_l & !al2mq_ena_l);
n_t_6x = !(!mq01_l & !shl_ena_l
         # ac00 & shl_ena_l & !al2mq_ena_l);
n_t_23x = !(!mq04_l & !shl_ena_l
          # ac03 & shl_ena_l & !al2mq_ena_l);
n_t_24x = !(!mq03_l & !shl_ena_l
          # ac02 & shl_ena_l & !al2mq_ena_l);

/* e13: sn7400 */
and00_l = !(mb00 & ac00);
and01_l = !(ac01 & mb01);
and03_l = !(mb03 & ac03);
and02_l = !(mb02 & ac02);

/* e14: mc8266 */
a02_l = !(!n_t_21x & !en0
        # n_t_21x & en0 & !en0);
a03_l = !(!n_t_13x & !en0
        # n_t_13x & en0 & !en0);
a01_l = !(!n_t_8x & !en0
        # n_t_8x & en0 & !en0);
a00_l = !(!n_t_9x & !en0
        # n_t_9x & en0 & !en0);

/* e15: sn7483 */
ad03_l = a03_l
       $ b03_l
       $ carry04_l;
gdollar_0 = a03_l & b03_l
          # a03_l & carry04_l
          # pad{11} & carry04_l;
ad02_l = a02_l
       $ b02_l
       $ gdollar_0;
gdollar_1 = a02_l & b02_l
          # a02_l & gdollar_0
          # pad{7} & gdollar_0;
ad01_l = b01_l
       $ a01_l
       $ gdollar_1;
gdollar_2 = b01_l & a01_l
          # b01_l & gdollar_1
          # pad{4} & gdollar_1;
ad00_l = b00_l
       $ a00_l
       $ gdollar_2;
carry_out_l = b00_l & a00_l
            # b00_l & gdollar_2
            # pad{16} & gdollar_2;

/* e16: sn74151 */
regbus02_l = ad02_l & !'b'0 & !right & !left & !twice
    # ad08_l  & !'b'0 & !right & !left &  twice
    # ad03_l  & !'b'0 & !right &  left & !twice
    # ad04_l  & !'b'0 & !right &  left &  twice
    # ad01_l & !'b'0 &  right & !left & !twice
    # ad00_l & !'b'0 &  right & !left &  twice
    # and02_l & !'b'0 &  right &  left & !twice
    # pg02_l & !'b'0 &  right &  left &  twice;
regbus02 = !regbus02_l;

/* e17: dec8271 */
mq00_l.ar = !n3c;
mq00_l.d = ad11_l & right2
         # n_t_6x & n3c & !right2
         # mq00_l & !n3c & !right2;
mq00_l.ck = !mq_load_l;
mq01_l.ar = !n3c;
mq01_l.d = mq00_l & right2
         # n_t_2x & n3c & !right2
         # mq01_l & !n3c & !right2;
mq01_l.ck = !mq_load_l;
mq02_l.ar = !n3c;
mq02_l.d = mq01_l & right2
         # n_t_24x & n3c & !right2
         # mq02_l & !n3c & !right2;
mq02_l.ck = !mq_load_l;
mq03_l.ar = !n3c;
mq03_l.d = mq02_l & right2
         # n_t_23x & n3c & !right2
         # mq03_l & !n3c & !right2;
mq03_l.ck = !mq_load_l;

/* e18: sn7420 */
ac04_11eq0_l = !(n_t_31x & n_t_29x & n_t_28x & n_t_30x);
mq00_03eq0_l = !(mq03_l & mq02_l & mq00_l & mq01_l);

/* e19: sn74153 */
n_t_21x = !'b'0 & ( !pad{1}&!en2&pc02_l
                     # !pad{1}& en2&md02_l
                     #  pad{1}&!en2&mq02_l
                     #  pad{1}& en2&ma02_l);
n_t_13x = !'b'0 & ( !pad{1}&!en2&pc03_l
                      # !pad{1}& en2&md03_l
                      #  pad{1}&!en2&mq03_l
                      #  pad{1}& en2&ma03_l);

/* e20: dec8271 */
pc03_l.ar = !n3a;
pc03_l.d = regbus03_l & n3a
         # pc03_l & !n3a;
pc03_l.ck = !pc_load_l;
pc02_l.ar = !n3a;
pc02_l.d = regbus02_l & n3a
         # pc02_l & !n3a;
pc02_l.ck = !pc_load_l;
pc00_l.ar = !n3a;
pc00_l.d = regbus00_l & n3a
         # pc00_l & !n3a;
pc00_l.ck = !pc_load_l;
pc01_l.ar = !n3a;
pc01_l.d = regbus01_l & n3a
         # pc01_l & !n3a;
pc01_l.ck = !pc_load_l;

/* e21: sn74151 */
regbus03_l = ad03_l & !'b'0 & !right & !left & !twice
    # ad09_l  & !'b'0 & !right & !left &  twice
    # ad04_l  & !'b'0 & !right &  left & !twice
    # ad05_l  & !'b'0 & !right &  left &  twice
    # ad02_l & !'b'0 &  right & !left & !twice
    # ad01_l & !'b'0 &  right & !left &  twice
    # and03_l & !'b'0 &  right &  left & !twice
    # pg03_l & !'b'0 &  right &  left &  twice;
regbus03 = !regbus03_l;

/* e22: n8881n */
/* ma07_l = !(cpma7 & n_t_1x); */
/* ma06_l = !(n_t_1x & cpma6); */
/* ma04_l = !(n_t_1x & cpma4); */
/* ma05_l = !(n_t_1x & cpma5); */

/* e23: sn74151 */
regbus04_l = ad04_l & !'b'0 & !right & !left & !twice
    # ad10_l  & !'b'0 & !right & !left &  twice
    # ad05_l  & !'b'0 & !right &  left & !twice
    # ad06_l  & !'b'0 & !right &  left &  twice
    # ad03_l & !'b'0 &  right & !left & !twice
    # ad02_l & !'b'0 &  right & !left &  twice
    # and04_l & !'b'0 &  right &  left & !twice
    # pg04_l & !'b'0 &  right &  left &  twice;
regbus04 = !regbus04_l;

/* e24: dec8271 */
mb06.ar = !n3b;
mb06.d = regbus06 & n3b
       # mb06 & !n3b;
mb06.ck = !mb_load_l;
mb07.ar = !n3b;
mb07.d = regbus07 & n3b
       # mb07 & !n3b;
mb07.ck = !mb_load_l;
mb05.ar = !n3b;
mb05.d = regbus05 & n3b
       # mb05 & !n3b;
mb05.ck = !mb_load_l;
mb04.ar = !n3b;
mb04.d = regbus04 & n3b
       # mb04 & !n3b;
mb04.ck = !mb_load_l;

/* e25: dec8271 */
cpma7.ar = !n3a;
cpma7.d = regbus07 & n3a
        # cpma7 & !n3a;
cpma7.ck = !cpma_load_l;
cpma6.ar = !n3a;
cpma6.d = regbus06 & n3a
        # cpma6 & !n3a;
cpma6.ck = !cpma_load_l;
cpma4.ar = !n3a;
cpma4.d = regbus04 & n3a
        # cpma4 & !n3a;
cpma4.ck = !cpma_load_l;
cpma5.ar = !n3a;
cpma5.d = regbus05 & n3a
        # cpma5 & !n3a;
cpma5.ck = !cpma_load_l;

/* e26: mc8266 */
pg04_l = !(!ma04_l & !pagez
         # pagez & !pagez);

/* e27: n8881n */
/* md07_l = !(mb07 & n_t_12x); */
/* md06_l = !(n_t_12x & mb06); */
/* md04_l = !(n_t_12x & mb04); */
/* md05_l = !(n_t_12x & mb05); */

/* e28: sn74151 */
regbus05_l = ad05_l & !'b'0 & !right & !left & !twice
    # ad11_l  & !'b'0 & !right & !left &  twice
    # ad06_l  & !'b'0 & !right &  left & !twice
    # ad07_l  & !'b'0 & !right &  left &  twice
    # ad04_l & !'b'0 &  right & !left & !twice
    # ad03_l & !'b'0 &  right & !left &  twice
    # and05_l & !'b'0 &  right &  left & !twice
    # md05_l & !'b'0 &  right &  left &  twice;
regbus05 = !regbus05_l;

/* e29: dec8271 */
ac06.ar = !b_init_l;
ac06.d = regbus06 & n3b
       # ac06 & !n3b;
ac06.ck = !ac_load_l;
ac07.ar = !b_init_l;
ac07.d = regbus07 & n3b
       # ac07 & !n3b;
ac07.ck = !ac_load_l;
ac05.ar = !b_init_l;
ac05.d = regbus05 & n3b
       # ac05 & !n3b;
ac05.ck = !ac_load_l;
ac04.ar = !b_init_l;
ac04.d = regbus04 & n3b
       # ac04 & !n3b;
ac04.ck = !ac_load_l;

/* e30: sn74153 */
n_t_36x = !'b'0 & ( !pad{1}&!en2&pc04_l
                     # !pad{1}& en2&md04_l
                     #  pad{1}&!en2&mq04_l
                     #  pad{1}& en2&ma04_l);
n_t_37x = !'b'0 & ( !pad{1}&!en2&pc05_l
                      # !pad{1}& en2&md05_l
                      #  pad{1}&!en2&mq05_l
                      #  pad{1}& en2&ma05_l);

/* e31: sn7487 */
b04_l = data_t & !data_f
      # data_f & data04
      # !data_f & !data04;
b07_l = data_t & !data_f
      # data_f & data07
      # !data_f & !data07;
b06_l = data_t & !data_f
      # data_f & data06
      # !data_f & !data06;
b05_l = data_t & !data_f
      # data_f & data05
      # !data_f & !data05;

/* e32: dec8235 */
/* data07 = !(!mq07_l & !mq2bus_l
       # ac07 & !ac2bus_l); */
/* data06 = !(!mq06_l & !mq2bus_l
       # ac06 & !ac2bus_l); */
/* data04 = !(!mq04_l & !mq2bus_l
       # ac04 & !ac2bus_l); */
/* data05 = !(!mq05_l & !mq2bus_l
       # ac05 & !ac2bus_l); */

/* e33: sn74151 */
regbus06_l = ad06_l & !'b'0 & !right & !left & !twice
    # ad00_l  & !'b'0 & !right & !left &  twice
    # ad07_l  & !'b'0 & !right &  left & !twice
    # ad08_l  & !'b'0 & !right &  left &  twice
    # ad05_l & !'b'0 &  right & !left & !twice
    # ad04_l & !'b'0 &  right & !left &  twice
    # and06_l & !'b'0 &  right &  left & !twice
    # md06_l & !'b'0 &  right &  left &  twice;
regbus06 = !regbus06_l;

/* e34: mc8266 */
n_t_11x = !(!mq06_l & !shl_ena_l
          # ac05 & shl_ena_l & !al2mq_ena_l);
n_t_4x = !(!mq05_l & !shl_ena_l
         # ac04 & shl_ena_l & !al2mq_ena_l);
n_t_3x = !(!mq08_l & !shl_ena_l
         # ac07 & shl_ena_l & !al2mq_ena_l);
n_t_18x = !(!mq07_l & !shl_ena_l
          # ac06 & shl_ena_l & !al2mq_ena_l);

/* e35: sn7400 */
and04_l = !(mb04 & ac04);
and05_l = !(ac05 & mb05);
and07_l = !(mb07 & ac07);
and06_l = !(mb06 & ac06);

/* e36: mc8266 */
a06_l = !(!n_t_39x & !en0
        # n_t_39x & en0 & !en0);
a07_l = !(!n_t_38x & !en0
        # n_t_38x & en0 & !en0);
a05_l = !(!n_t_37x & !en0
        # n_t_37x & en0 & !en0);
a04_l = !(!n_t_36x & !en0
        # n_t_36x & en0 & !en0);

/* e37: sn7483 */
ad07_l = a07_l
       $ b07_l
       $ carry08_l;
gdollar_3 = a07_l & b07_l
          # a07_l & carry08_l
          # pad{11} & carry08_l;
ad06_l = a06_l
       $ b06_l
       $ gdollar_3;
gdollar_4 = a06_l & b06_l
          # a06_l & gdollar_3
          # pad{7} & gdollar_3;
ad05_l = b05_l
       $ a05_l
       $ gdollar_4;
gdollar_5 = b05_l & a05_l
          # b05_l & gdollar_4
          # pad{4} & gdollar_4;
ad04_l = b04_l
       $ a04_l
       $ gdollar_5;
carry04_l = b04_l & a04_l
          # b04_l & gdollar_5
          # pad{16} & gdollar_5;

/* e38: sn74151 */
regbus07_l = ad07_l & !'b'0 & !right & !left & !twice
    # ad01_l  & !'b'0 & !right & !left &  twice
    # ad08_l  & !'b'0 & !right &  left & !twice
    # ad09_l  & !'b'0 & !right &  left &  twice
    # ad06_l & !'b'0 &  right & !left & !twice
    # ad05_l & !'b'0 &  right & !left &  twice
    # and07_l & !'b'0 &  right &  left & !twice
    # md07_l & !'b'0 &  right &  left &  twice;
regbus07 = !regbus07_l;

/* e39: dec8271 */
mq04_l.ar = !n3c;
mq04_l.d = mq03_l & right2
         # n_t_4x & n3c & !right2
         # mq04_l & !n3c & !right2;
mq04_l.ck = !mq_load_l;
mq05_l.ar = !n3c;
mq05_l.d = mq04_l & right2
         # n_t_11x & n3c & !right2
         # mq05_l & !n3c & !right2;
mq05_l.ck = !mq_load_l;
mq06_l.ar = !n3c;
mq06_l.d = mq05_l & right2
         # n_t_18x & n3c & !right2
         # mq06_l & !n3c & !right2;
mq06_l.ck = !mq_load_l;
mq07_l.ar = !n3c;
mq07_l.d = mq06_l & right2
         # n_t_3x & n3c & !right2
         # mq07_l & !n3c & !right2;
mq07_l.ck = !mq_load_l;

/* e40: sn7402 */
n_t_28x = !(ac08
          # ac09);
n_t_30x = !(ac10
          # ac11);
n_t_31x = !(ac05
          # ac04);
n_t_29x = !(ac07
          # ac06);

/* e41: sn74153 */
n_t_39x = !'b'0 & ( !pad{1}&!en2&pc06_l
                     # !pad{1}& en2&md06_l
                     #  pad{1}&!en2&mq06_l
                     #  pad{1}& en2&ma06_l);
n_t_38x = !'b'0 & ( !pad{1}&!en2&pc07_l
                      # !pad{1}& en2&md07_l
                      #  pad{1}&!en2&mq07_l
                      #  pad{1}& en2&ma07_l);

/* e42: dec8271 */
pc07_l.ar = !n3a;
pc07_l.d = regbus07_l & n3a
         # pc07_l & !n3a;
pc07_l.ck = !pc_load_l;
pc06_l.ar = !n3a;
pc06_l.d = regbus06_l & n3a
         # pc06_l & !n3a;
pc06_l.ck = !pc_load_l;
pc04_l.ar = !n3a;
pc04_l.d = regbus04_l & n3a
         # pc04_l & !n3a;
pc04_l.ck = !pc_load_l;
pc05_l.ar = !n3a;
pc05_l.d = regbus05_l & n3a
         # pc05_l & !n3a;
pc05_l.ck = !pc_load_l;

/* e43: sn74151 */
regbus08_l = ad08_l & !'b'0 & !right & !left & !twice
    # ad02_l  & !'b'0 & !right & !left &  twice
    # ad09_l  & !'b'0 & !right &  left & !twice
    # ad10_l  & !'b'0 & !right &  left &  twice
    # ad07_l & !'b'0 &  right & !left & !twice
    # ad06_l & !'b'0 &  right & !left &  twice
    # and08_l & !'b'0 &  right &  left & !twice
    # md08_l & !'b'0 &  right &  left &  twice;
regbus08 = !regbus08_l;

/* e44: n8881n */
/* ma11_l = !(cpma11 & n_t_1x); */
/* ma10_l = !(n_t_1x & cpma10); */
/* ma08_l = !(cpma8 & n_t_1x); */
/* ma09_l = !(n_t_1x & cpma9); */

/* e45: sn7430 */
mq04_11eq0_l = !(mq11_l & mq10_l & mq09_l & mq08_l & mq06_l & mq07_l & mq05_l & mq04_l);

/* e46: dec8271 */
cpma10.ar = !n3a;
cpma10.d = regbus10 & n3a
         # cpma10 & !n3a;
cpma10.ck = !cpma_load_l;
cpma11.ar = !n3a;
cpma11.d = regbus11 & n3a
         # cpma11 & !n3a;
cpma11.ck = !cpma_load_l;
cpma8.ar = !n3a;
cpma8.d = regbus08 & n3a
        # cpma8 & !n3a;
cpma8.ck = !cpma_load_l;
cpma9.ar = !n3a;
cpma9.d = regbus09 & n3a
        # cpma9 & !n3a;
cpma9.ck = !cpma_load_l;

/* e47: dec8271 */
pc08_l.ar = !n3a;
pc08_l.d = regbus08_l & n3a
         # pc08_l & !n3a;
pc08_l.ck = !pc_load_l;
pc09_l.ar = !n3a;
pc09_l.d = regbus09_l & n3a
         # pc09_l & !n3a;
pc09_l.ck = !pc_load_l;
pc10_l.ar = !n3a;
pc10_l.d = regbus10_l & n3a
         # pc10_l & !n3a;
pc10_l.ck = !pc_load_l;
pc11_l.ar = !n3a;
pc11_l.d = regbus11_l & n3a
         # pc11_l & !n3a;
pc11_l.ck = !pc_load_l;

/* e48: sn74151 */
regbus09_l = ad09_l & !'b'0 & !right & !left & !twice
    # ad03_l  & !'b'0 & !right & !left &  twice
    # ad10_l  & !'b'0 & !right &  left & !twice
    # ad11_l  & !'b'0 & !right &  left &  twice
    # ad08_l & !'b'0 &  right & !left & !twice
    # ad07_l & !'b'0 &  right & !left &  twice
    # and09_l & !'b'0 &  right &  left & !twice
    # md09_l & !'b'0 &  right &  left &  twice;
regbus09 = !regbus09_l;

/* e49: n8881n */
/* md11_l = !(mb11 & n_t_12x); */
/* md10_l = !(n_t_12x & mb10); */
/* md08_l = !(mb08 & n_t_12x); */
/* md09_l = !(mb09 & n_t_12x); */

/* e50: dec8271 */
mb10.ar = !n3b;
mb10.d = regbus10 & n3b
       # mb10 & !n3b;
mb10.ck = !mb_load_l;
mb11.ar = !n3b;
mb11.d = regbus11 & n3b
       # mb11 & !n3b;
mb11.ck = !mb_load_l;
mb09.ar = !n3b;
mb09.d = regbus09 & n3b
       # mb09 & !n3b;
mb09.ck = !mb_load_l;
mb08.ar = !n3b;
mb08.d = regbus08 & n3b
       # mb08 & !n3b;
mb08.ck = !mb_load_l;

/* e51: sn74153 */
n_t_10x = !'b'0 & ( !pad{1}&!en2&pc08_l
                     # !pad{1}& en2&md08_l
                     #  pad{1}&!en2&mq08_l
                     #  pad{1}& en2&ma08_l);
n_t_40x = !'b'0 & ( !pad{1}&!en2&pc09_l
                      # !pad{1}& en2&md09_l
                      #  pad{1}&!en2&mq09_l
                      #  pad{1}& en2&ma09_l);

/* e52: sn7483 */
ad11_l = a11_l
       $ b11_l
       $ carry_in_l;
gdollar_6 = a11_l & b11_l
          # a11_l & carry_in_l
          # pad{11} & carry_in_l;
ad10_l = a10_l
       $ b10_l
       $ gdollar_6;
gdollar_7 = a10_l & b10_l
          # a10_l & gdollar_6
          # pad{7} & gdollar_6;
ad09_l = b09_l
       $ a09_l
       $ gdollar_7;
gdollar_8 = b09_l & a09_l
          # b09_l & gdollar_7
          # pad{4} & gdollar_7;
ad08_l = a08_l
       $ b08_l
       $ gdollar_8;
carry08_l = a08_l & b08_l
          # a08_l & gdollar_8
          # pad{16} & gdollar_8;

/* e53: sn74151 */
regbus10_l = ad10_l & !'b'0 & !right & !left & !twice
    # ad04_l  & !'b'0 & !right & !left &  twice
    # ad11_l  & !'b'0 & !right &  left & !twice
    # adlk_l  & !'b'0 & !right &  left &  twice
    # ad09_l & !'b'0 &  right & !left & !twice
    # ad08_l & !'b'0 &  right & !left &  twice
    # and10_l & !'b'0 &  right &  left & !twice
    # md10_l & !'b'0 &  right &  left &  twice;
regbus10 = !regbus10_l;

/* e54: dec8271 */
mq08_l.ar = !n3c;
mq08_l.d = mq07_l & right2
         # n_t_22x & n3c & !right2
         # mq08_l & !n3c & !right2;
mq08_l.ck = !mq_load_l;
mq09_l.ar = !n3c;
mq09_l.d = mq08_l & right2
         # n_t_19x & n3c & !right2
         # mq09_l & !n3c & !right2;
mq09_l.ck = !mq_load_l;
mq10_l.ar = !n3c;
mq10_l.d = mq09_l & right2
         # n_t_7x & n3c & !right2
         # mq10_l & !n3c & !right2;
mq10_l.ck = !mq_load_l;
mq11_l.ar = !n3c;
mq11_l.d = mq10_l & right2
         # n_t_20x & n3c & !right2
         # mq11_l & !n3c & !right2;
mq11_l.ck = !mq_load_l;

/* e55: dec8271 */
ac10.ar = !b_init_l;
ac10.d = regbus10 & n3b
       # ac10 & !n3b;
ac10.ck = !ac_load_l;
ac11.ar = !b_init_l;
ac11.d = regbus11 & n3b
       # ac11 & !n3b;
ac11.ck = !ac_load_l;
ac09.ar = !b_init_l;
ac09.d = regbus09 & n3b
       # ac09 & !n3b;
ac09.ck = !ac_load_l;
ac08.ar = !b_init_l;
ac08.d = regbus08 & n3b
       # ac08 & !n3b;
ac08.ck = !ac_load_l;

/* e56: mc8266 */
a11_l = !(!n_t_43x & !en0
        # n_t_43x & en0 & !en0);
a10_l = !(!n_t_42x & !en0
        # n_t_42x & en0 & !en0);
a08_l = !(!n_t_10x & !en0
        # n_t_10x & en0 & !en0);
a09_l = !(!n_t_40x & !en0
        # n_t_40x & en0 & !en0);

/* e57: sn7487 */
b08_l = data_t & !data_f
      # data_f & data08
      # !data_f & !data08;
b11_l = data_t & !data_f
      # data_f & data11
      # !data_f & !data11;
b10_l = data_t & !data_f
      # data_f & data10
      # !data_f & !data10;
b09_l = data_t & !data_f
      # data_f & data09
      # !data_f & !data09;

/* e58: sn74151 */
regbus11_l = ad11_l & !'b'0 & !right & !left & !twice
    # ad05_l  & !'b'0 & !right & !left &  twice
    # adlk_l  & !'b'0 & !right &  left & !twice
    # ad00_l  & !'b'0 & !right &  left &  twice
    # ad10_l & !'b'0 &  right & !left & !twice
    # ad09_l & !'b'0 &  right & !left &  twice
    # and11_l & !'b'0 &  right &  left & !twice
    # md11_l & !'b'0 &  right &  left &  twice;
regbus11 = !regbus11_l;

/* e59: mc8266 */
n_t_7x = !(!mq11_l & !shl_ena_l
         # ac10 & shl_ena_l & !al2mq_ena_l);
n_t_20x = !(!mq_data_l & !shl_ena_l
          # ac11 & shl_ena_l & !al2mq_ena_l);
n_t_22x = !(!mq09_l & !shl_ena_l
          # ac08 & shl_ena_l & !al2mq_ena_l);
n_t_19x = !(!mq10_l & !shl_ena_l
          # ac09 & shl_ena_l & !al2mq_ena_l);

/* e60: dec8235 */
/* data09 = !(!mq09_l & !mq2bus_l
       # ac09 & !ac2bus_l); */
/* data08 = !(!mq08_l & !mq2bus_l
       # ac08 & !ac2bus_l); */
/* data10 = !(!mq10_l & !mq2bus_l
       # ac10 & !ac2bus_l); */
/* data11 = !(!mq11_l & !mq2bus_l
       # ac11 & !ac2bus_l); */

/* e61: sn7400 */
and08_l = !(mb08 & ac08);
and09_l = !(mb09 & ac09);
and11_l = !(ac11 & mb11);
and10_l = !(ac10 & mb10);

/* e62: sn74153 */
n_t_42x = !'b'0 & ( !pad{1}&!en2&pc10_l
                     # !pad{1}& en2&md10_l
                     #  pad{1}&!en2&mq10_l
                     #  pad{1}& en2&ma10_l);
n_t_43x = !'b'0 & ( !pad{1}&!en2&pc11_l
                      # !pad{1}& en2&md11_l
                      #  pad{1}&!en2&mq11_l
                      #  pad{1}& en2&ma11_l);

/* e63: sn74h04 */
n_t_5x = !md_dir_l;
n_t_12x = !n_t_5x;
n3b = 'b'1;
right2 = !right_l;
n3c = 'b'1;
b_init_l = !init;

/* e64: sn74h04 */
n3a = 'b'1;
n_t_1x = !mac_l;
right = !right_l;
left = !left_l;
twice = !twice_l;

/* Open collector 'wire-or's */
property atmel {open_collector= data00};
!data00 = (!mq00_l & !mq2bus_l
       # ac00 & !ac2bus_l);
data00.oe = (!mq00_l & !mq2bus_l
       # ac00 & !ac2bus_l);
property atmel {open_collector= data01};
!data01 = (!mq01_l & !mq2bus_l
       # ac01 & !ac2bus_l);
data01.oe = (!mq01_l & !mq2bus_l
       # ac01 & !ac2bus_l);
property atmel {open_collector= data02};
!data02 = (!mq02_l & !mq2bus_l
       # ac02 & !ac2bus_l);
data02.oe = (!mq02_l & !mq2bus_l
       # ac02 & !ac2bus_l);
property atmel {open_collector= data03};
!data03 = (!mq03_l & !mq2bus_l
       # ac03 & !ac2bus_l);
data03.oe = (!mq03_l & !mq2bus_l
       # ac03 & !ac2bus_l);
property atmel {open_collector= data04};
!data04 = (!mq04_l & !mq2bus_l
       # ac04 & !ac2bus_l);
data04.oe = (!mq04_l & !mq2bus_l
       # ac04 & !ac2bus_l);
property atmel {open_collector= data05};
!data05 = (!mq05_l & !mq2bus_l
       # ac05 & !ac2bus_l);
data05.oe = (!mq05_l & !mq2bus_l
       # ac05 & !ac2bus_l);
property atmel {open_collector= data06};
!data06 = (!mq06_l & !mq2bus_l
       # ac06 & !ac2bus_l);
data06.oe = (!mq06_l & !mq2bus_l
       # ac06 & !ac2bus_l);
property atmel {open_collector= data07};
!data07 = (!mq07_l & !mq2bus_l
       # ac07 & !ac2bus_l);
data07.oe = (!mq07_l & !mq2bus_l
       # ac07 & !ac2bus_l);
property atmel {open_collector= data08};
!data08 = (!mq08_l & !mq2bus_l
       # ac08 & !ac2bus_l);
data08.oe = (!mq08_l & !mq2bus_l
       # ac08 & !ac2bus_l);
property atmel {open_collector= data09};
!data09 = (!mq09_l & !mq2bus_l
       # ac09 & !ac2bus_l);
data09.oe = (!mq09_l & !mq2bus_l
       # ac09 & !ac2bus_l);
property atmel {open_collector= data10};
!data10 = (!mq10_l & !mq2bus_l
       # ac10 & !ac2bus_l);
data10.oe = (!mq10_l & !mq2bus_l
       # ac10 & !ac2bus_l);
property atmel {open_collector= data11};
!data11 = (!mq11_l & !mq2bus_l
       # ac11 & !ac2bus_l);
data11.oe = (!mq11_l & !mq2bus_l
       # ac11 & !ac2bus_l);
property atmel {open_collector= ma00_l};
!ma00_l = (n_t_1x & cpma0);
ma00_l.oe = (n_t_1x & cpma0);
property atmel {open_collector= ma01_l};
!ma01_l = (n_t_1x & cpma1);
ma01_l.oe = (n_t_1x & cpma1);
property atmel {open_collector= ma02_l};
!ma02_l = (n_t_1x & cpma2);
ma02_l.oe = (n_t_1x & cpma2);
property atmel {open_collector= ma03_l};
!ma03_l = (cpma3 & n_t_1x);
ma03_l.oe = (cpma3 & n_t_1x);
property atmel {open_collector= ma04_l};
!ma04_l = (n_t_1x & cpma4);
ma04_l.oe = (n_t_1x & cpma4);
property atmel {open_collector= ma05_l};
!ma05_l = (n_t_1x & cpma5);
ma05_l.oe = (n_t_1x & cpma5);
property atmel {open_collector= ma06_l};
!ma06_l = (n_t_1x & cpma6);
ma06_l.oe = (n_t_1x & cpma6);
property atmel {open_collector= ma07_l};
!ma07_l = (cpma7 & n_t_1x);
ma07_l.oe = (cpma7 & n_t_1x);
property atmel {open_collector= ma08_l};
!ma08_l = (cpma8 & n_t_1x);
ma08_l.oe = (cpma8 & n_t_1x);
property atmel {open_collector= ma09_l};
!ma09_l = (n_t_1x & cpma9);
ma09_l.oe = (n_t_1x & cpma9);
property atmel {open_collector= ma10_l};
!ma10_l = (n_t_1x & cpma10);
ma10_l.oe = (n_t_1x & cpma10);
property atmel {open_collector= ma11_l};
!ma11_l = (cpma11 & n_t_1x);
ma11_l.oe = (cpma11 & n_t_1x);
property atmel {open_collector= md00_l};
!md00_l = (n_t_12x & mb00);
md00_l.oe = (n_t_12x & mb00);
property atmel {open_collector= md01_l};
!md01_l = (n_t_12x & mb01);
md01_l.oe = (n_t_12x & mb01);
property atmel {open_collector= md02_l};
!md02_l = (n_t_12x & mb02);
md02_l.oe = (n_t_12x & mb02);
property atmel {open_collector= md03_l};
!md03_l = (mb03 & n_t_12x);
md03_l.oe = (mb03 & n_t_12x);
property atmel {open_collector= md04_l};
!md04_l = (n_t_12x & mb04);
md04_l.oe = (n_t_12x & mb04);
property atmel {open_collector= md05_l};
!md05_l = (n_t_12x & mb05);
md05_l.oe = (n_t_12x & mb05);
property atmel {open_collector= md06_l};
!md06_l = (n_t_12x & mb06);
md06_l.oe = (n_t_12x & mb06);
property atmel {open_collector= md07_l};
!md07_l = (mb07 & n_t_12x);
md07_l.oe = (mb07 & n_t_12x);
property atmel {open_collector= md08_l};
!md08_l = (mb08 & n_t_12x);
md08_l.oe = (mb08 & n_t_12x);
property atmel {open_collector= md09_l};
!md09_l = (mb09 & n_t_12x);
md09_l.oe = (mb09 & n_t_12x);
property atmel {open_collector= md10_l};
!md10_l = (n_t_12x & mb10);
md10_l.oe = (n_t_12x & mb10);
property atmel {open_collector= md11_l};
!md11_l = (mb11 & n_t_12x);
md11_l.oe = (mb11 & n_t_12x);