Exported from /home/vrs/Eagle/projects/DEC/Mxxx/M8300/M8300B.sch Part Pad Pin Dir Net C1 + + pas VCC - - pas GND C2 + + pas VCC - - pas GND C3 + + pas VCC - - pas GND C4 1 1 pas VCC 2 2 pas GND C5 1 1 pas VCC 2 2 pas GND C6 1 1 pas VCC 2 2 pas GND C7 1 1 pas VCC 2 2 pas GND C8 1 1 pas VCC 2 2 pas GND C9 1 1 pas VCC 2 2 pas GND C10 1 1 pas VCC 2 2 pas GND C11 1 1 pas VCC 2 2 pas GND C12 1 1 pas VCC 2 2 pas GND C13 1 1 pas VCC 2 2 pas GND C14 1 1 pas VCC 2 2 pas GND C15 1 1 pas !PC_LOAD 2 2 pas GND E1 1 O oc !MA03 2 I0 in CPMA3 3 I1 in N$1 4 O oc !MA02 5 I0 in N$1 6 I1 in CPMA2 8 I0 in N$1 9 I1 in CPMA0 10 O oc !MA00 11 I0 in N$1 12 I1 in CPMA1 13 O oc !MA01 E2 1 O oc !MD03 2 I0 in MB03 3 I1 in N$12 4 O oc !MD02 5 I0 in N$12 6 I1 in MB02 8 I0 in N$12 9 I1 in MB00 10 O oc !MD00 11 I0 in N$12 12 I1 in MB01 13 O oc !MD01 E3 1 R in +3B 2 I1 in REGBUS03 3 I0 in REGBUS02 5 Q0 out MB02 6 C in !MB_LOAD 7 Q1 out MB03 9 Q2 out MB01 10 L in +3B 11 Q3 out MB00 13 S in GND 14 I3 in REGBUS00 15 I2 in REGBUS01 E4 1 R in +3A 2 I1 in REGBUS02 3 I0 in REGBUS03 5 Q0 out CPMA3 6 C in !CPMA_LOAD 7 Q1 out CPMA2 9 Q2 out CPMA0 10 L in +3A 11 Q3 out CPMA1 13 S in GND 14 I3 in REGBUS01 15 I2 in REGBUS00 E5 2 B0 in !MA02 3 F0 out !PG02 4 F1 out !PG03 5 B1 in !MA03 7 S1 in PAGEZ 9 S0 in PAGEZ 10 A2 in VCC 11 B2 in !MA01 12 F2 out !PG01 13 F3 out !PG00 14 B3 in !MA00 15 A3 in VCC E6 1 D3 in !AD02 2 D2 in !AD01 3 D1 in !AD06 4 D0 in !AD00 5 Y out !REGBUS00 6 W out REGBUS00 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !PG00 13 D6 in !AND00 14 D5 in !AD11 15 D4 in !ADLK E7 1 A0 in AC03 2 B0 in !MQ03 3 F0 oc DATA03 4 F1 oc DATA02 5 B1 in !MQ02 6 A1 in AC02 7 S1 in !AC2BUS 9 S0 in !MQ2BUS 10 A2 in AC00 11 B2 in !MQ00 12 F2 oc DATA00 13 F3 oc DATA01 14 B3 in !MQ01 15 A3 in AC01 E8 1 R in !B_INIT 2 I1 in REGBUS03 3 I0 in REGBUS02 5 Q0 out AC02 6 C in !AC_LOAD 7 Q1 out AC03 9 Q2 out AC01 10 L in +3B 11 Q3 out AC00 13 S in GND 14 I3 in REGBUS00 15 I2 in REGBUS01 E9 1 1G in GND 2 B in EN1 3 1C3 in !MA00 4 1C2 in !MQ00 5 1C1 in !MD00 6 1C0 in !PC00 7 1Y out N$9 9 2Y out N$8 10 2C0 in !PC01 11 2C1 in !MD01 12 2C2 in !MQ01 13 2C3 in !MA01 14 A in EN2 15 2G in GND E10 1 S1 in DATA_F 2 A0 in DATA02 3 F0 out !B02 5 A1 in DATA03 6 F1 out !B03 8 S0 in DATA_T 9 F2 out !B01 10 A2 in DATA01 12 F3 out !B00 13 A3 in DATA00 E11 1 D3 in !AD03 2 D2 in !AD02 3 D1 in !AD07 4 D0 in !AD01 5 Y out !REGBUS01 6 W out REGBUS01 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !PG01 13 D6 in !AND01 14 D5 in !ADLK 15 D4 in !AD00 E12 1 A0 in AC01 2 B0 in !MQ02 3 F0 out N$2 4 F1 out N$6 5 B1 in !MQ01 6 A1 in AC00 7 S1 in !AL2MQ_ENA 9 S0 in !SHL_ENA 10 A2 in AC03 11 B2 in !MQ04 12 F2 out N$23 13 F3 out N$24 14 B3 in !MQ03 15 A3 in AC02 E13 1 I0 in MB00 2 I1 in AC00 3 O out !AND00 4 I0 in AC01 5 I1 in MB01 6 O out !AND01 8 O out !AND03 9 I0 in MB03 10 I1 in AC03 11 O out !AND02 12 I0 in MB02 13 I1 in AC02 E14 1 A0 in N$21 2 B0 in N$21 3 F0 out !A02 4 F1 out !A03 5 B1 in N$13 6 A1 in N$13 7 S1 in EN0 9 S0 in EN0 10 A2 in N$8 11 B2 in N$8 12 F2 out !A01 13 F3 out !A00 14 B3 in N$9 15 A3 in N$9 E15 1 A4 in !B00 2 S3 out !AD01 3 A3 in !B01 4 B3 in !A01 6 S2 out !AD02 7 B2 in !B02 8 A2 in !A02 9 S1 out !AD03 10 A1 in !A03 11 B1 in !B03 13 C0 in !CARRY04 14 C4 out !CARRY_OUT 15 S4 out !AD00 16 B4 in !A00 E16 1 D3 in !AD04 2 D2 in !AD03 3 D1 in !AD08 4 D0 in !AD02 5 Y out !REGBUS02 6 W out REGBUS02 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !PG02 13 D6 in !AND02 14 D5 in !AD00 15 D4 in !AD01 E17 1 R in +3C 2 I1 in N$2 3 I0 in N$6 4 D in !AD11 5 Q0 out !MQ00 6 C in !MQ_LOAD 7 Q1 out !MQ01 9 Q2 out !MQ02 10 L in +3C 11 Q3 out !MQ03 13 S in RIGHT2 14 I3 in N$23 15 I2 in N$24 E18 1 I0 in N$31 2 I1 in N$29 4 I2 in N$28 5 I3 in N$30 6 O out !AC04-11EQ0 8 O out !MQ00-03EQ0 9 I0 in !MQ03 10 I1 in !MQ02 12 I2 in !MQ00 13 I3 in !MQ01 E19 1 1G in GND 2 B in EN1 3 1C3 in !MA02 4 1C2 in !MQ02 5 1C1 in !MD02 6 1C0 in !PC02 7 1Y out N$21 9 2Y out N$13 10 2C0 in !PC03 11 2C1 in !MD03 12 2C2 in !MQ03 13 2C3 in !MA03 14 A in EN2 15 2G in GND E20 1 R in +3A 2 I1 in !REGBUS02 3 I0 in !REGBUS03 5 Q0 out !PC03 6 C in !PC_LOAD 7 Q1 out !PC02 9 Q2 out !PC00 10 L in +3A 11 Q3 out !PC01 13 S in GND 14 I3 in !REGBUS01 15 I2 in !REGBUS00 E21 1 D3 in !AD05 2 D2 in !AD04 3 D1 in !AD09 4 D0 in !AD03 5 Y out !REGBUS03 6 W out REGBUS03 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !PG03 13 D6 in !AND03 14 D5 in !AD01 15 D4 in !AD02 E22 1 O oc !MA07 2 I0 in CPMA7 3 I1 in N$1 4 O oc !MA06 5 I0 in N$1 6 I1 in CPMA6 8 I0 in N$1 9 I1 in CPMA4 10 O oc !MA04 11 I0 in N$1 12 I1 in CPMA5 13 O oc !MA05 E23 1 D3 in !AD06 2 D2 in !AD05 3 D1 in !AD10 4 D0 in !AD04 5 Y out !REGBUS04 6 W out REGBUS04 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !PG04 13 D6 in !AND04 14 D5 in !AD02 15 D4 in !AD03 E24 1 R in +3B 2 I1 in REGBUS07 3 I0 in REGBUS06 5 Q0 out MB06 6 C in !MB_LOAD 7 Q1 out MB07 9 Q2 out MB05 10 L in +3B 11 Q3 out MB04 13 S in GND 14 I3 in REGBUS04 15 I2 in REGBUS05 E25 1 R in +3A 2 I1 in REGBUS06 3 I0 in REGBUS07 5 Q0 out CPMA7 6 C in !CPMA_LOAD 7 Q1 out CPMA6 9 Q2 out CPMA4 10 L in +3A 11 Q3 out CPMA5 13 S in GND 14 I3 in REGBUS05 15 I2 in REGBUS04 E26 7 S1 in PAGEZ 9 S0 in PAGEZ 13 F3 out !PG04 14 B3 in !MA04 15 A3 in VCC E27 1 O oc !MD07 2 I0 in MB07 3 I1 in N$12 4 O oc !MD06 5 I0 in N$12 6 I1 in MB06 8 I0 in N$12 9 I1 in MB04 10 O oc !MD04 11 I0 in N$12 12 I1 in MB05 13 O oc !MD05 E28 1 D3 in !AD07 2 D2 in !AD06 3 D1 in !AD11 4 D0 in !AD05 5 Y out !REGBUS05 6 W out REGBUS05 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD05 13 D6 in !AND05 14 D5 in !AD03 15 D4 in !AD04 E29 1 R in !B_INIT 2 I1 in REGBUS07 3 I0 in REGBUS06 5 Q0 out AC06 6 C in !AC_LOAD 7 Q1 out AC07 9 Q2 out AC05 10 L in +3B 11 Q3 out AC04 13 S in GND 14 I3 in REGBUS04 15 I2 in REGBUS05 E30 1 1G in GND 2 B in EN1 3 1C3 in !MA04 4 1C2 in !MQ04 5 1C1 in !MD04 6 1C0 in !PC04 7 1Y out N$36 9 2Y out N$37 10 2C0 in !PC05 11 2C1 in !MD05 12 2C2 in !MQ05 13 2C3 in !MA05 14 A in EN2 15 2G in GND E31 1 S1 in DATA_F 2 A0 in DATA04 3 F0 out !B04 5 A1 in DATA07 6 F1 out !B07 8 S0 in DATA_T 9 F2 out !B06 10 A2 in DATA06 12 F3 out !B05 13 A3 in DATA05 E32 1 A0 in AC07 2 B0 in !MQ07 3 F0 oc DATA07 4 F1 oc DATA06 5 B1 in !MQ06 6 A1 in AC06 7 S1 in !AC2BUS 9 S0 in !MQ2BUS 10 A2 in AC04 11 B2 in !MQ04 12 F2 oc DATA04 13 F3 oc DATA05 14 B3 in !MQ05 15 A3 in AC05 E33 1 D3 in !AD08 2 D2 in !AD07 3 D1 in !AD00 4 D0 in !AD06 5 Y out !REGBUS06 6 W out REGBUS06 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD06 13 D6 in !AND06 14 D5 in !AD04 15 D4 in !AD05 E34 1 A0 in AC05 2 B0 in !MQ06 3 F0 out N$11 4 F1 out N$4 5 B1 in !MQ05 6 A1 in AC04 7 S1 in !AL2MQ_ENA 9 S0 in !SHL_ENA 10 A2 in AC07 11 B2 in !MQ08 12 F2 out N$3 13 F3 out N$18 14 B3 in !MQ07 15 A3 in AC06 E35 1 I0 in MB04 2 I1 in AC04 3 O out !AND04 4 I0 in AC05 5 I1 in MB05 6 O out !AND05 8 O out !AND07 9 I0 in MB07 10 I1 in AC07 11 O out !AND06 12 I0 in MB06 13 I1 in AC06 E36 1 A0 in N$39 2 B0 in N$39 3 F0 out !A06 4 F1 out !A07 5 B1 in N$38 6 A1 in N$38 7 S1 in EN0 9 S0 in EN0 10 A2 in N$37 11 B2 in N$37 12 F2 out !A05 13 F3 out !A04 14 B3 in N$36 15 A3 in N$36 E37 1 A4 in !B04 2 S3 out !AD05 3 A3 in !B05 4 B3 in !A05 6 S2 out !AD06 7 B2 in !B06 8 A2 in !A06 9 S1 out !AD07 10 A1 in !A07 11 B1 in !B07 13 C0 in !CARRY08 14 C4 out !CARRY04 15 S4 out !AD04 16 B4 in !A04 E38 1 D3 in !AD09 2 D2 in !AD08 3 D1 in !AD01 4 D0 in !AD07 5 Y out !REGBUS07 6 W out REGBUS07 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD07 13 D6 in !AND07 14 D5 in !AD05 15 D4 in !AD06 E39 1 R in +3C 2 I1 in N$11 3 I0 in N$4 4 D in !MQ03 5 Q0 out !MQ04 6 C in !MQ_LOAD 7 Q1 out !MQ05 9 Q2 out !MQ06 10 L in +3C 11 Q3 out !MQ07 13 S in RIGHT2 14 I3 in N$3 15 I2 in N$18 E40 1 O out N$28 2 I0 in AC08 3 I1 in AC09 4 O out N$30 5 I0 in AC10 6 I1 in AC11 8 I0 in AC05 9 I1 in AC04 10 O out N$31 11 I0 in AC07 12 I1 in AC06 13 O out N$29 E41 1 1G in GND 2 B in EN1 3 1C3 in !MA06 4 1C2 in !MQ06 5 1C1 in !MD06 6 1C0 in !PC06 7 1Y out N$39 9 2Y out N$38 10 2C0 in !PC07 11 2C1 in !MD07 12 2C2 in !MQ07 13 2C3 in !MA07 14 A in EN2 15 2G in GND E42 1 R in +3A 2 I1 in !REGBUS06 3 I0 in !REGBUS07 5 Q0 out !PC07 6 C in !PC_LOAD 7 Q1 out !PC06 9 Q2 out !PC04 10 L in +3A 11 Q3 out !PC05 13 S in GND 14 I3 in !REGBUS05 15 I2 in !REGBUS04 E43 1 D3 in !AD10 2 D2 in !AD09 3 D1 in !AD02 4 D0 in !AD08 5 Y out !REGBUS08 6 W out REGBUS08 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD08 13 D6 in !AND08 14 D5 in !AD06 15 D4 in !AD07 E44 1 O oc !MA11 2 I0 in CPMA11 3 I1 in N$1 4 O oc !MA10 5 I0 in N$1 6 I1 in CPMA10 8 I0 in CPMA8 9 I1 in N$1 10 O oc !MA08 11 I0 in N$1 12 I1 in CPMA9 13 O oc !MA09 E45 1 I0 in !MQ11 2 I1 in !MQ10 3 I2 in !MQ09 4 I3 in !MQ08 5 I4 in !MQ06 6 I5 in !MQ07 8 O out !MQ04-11EQ0 11 I6 in !MQ05 12 I7 in !MQ04 E46 1 R in +3A 2 I1 in REGBUS11 3 I0 in REGBUS10 5 Q0 out CPMA10 6 C in !CPMA_LOAD 7 Q1 out CPMA11 9 Q2 out CPMA8 10 L in +3A 11 Q3 out CPMA9 13 S in GND 14 I3 in REGBUS09 15 I2 in REGBUS08 E47 1 R in +3A 2 I1 in !REGBUS09 3 I0 in !REGBUS08 5 Q0 out !PC08 6 C in !PC_LOAD 7 Q1 out !PC09 9 Q2 out !PC10 10 L in +3A 11 Q3 out !PC11 13 S in GND 14 I3 in !REGBUS11 15 I2 in !REGBUS10 E48 1 D3 in !AD11 2 D2 in !AD10 3 D1 in !AD03 4 D0 in !AD09 5 Y out !REGBUS09 6 W out REGBUS09 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD09 13 D6 in !AND09 14 D5 in !AD07 15 D4 in !AD08 E49 1 O oc !MD11 2 I0 in MB11 3 I1 in N$12 4 O oc !MD10 5 I0 in N$12 6 I1 in MB10 8 I0 in MB08 9 I1 in N$12 10 O oc !MD08 11 I0 in MB09 12 I1 in N$12 13 O oc !MD09 E50 1 R in +3B 2 I1 in REGBUS11 3 I0 in REGBUS10 5 Q0 out MB10 6 C in !MB_LOAD 7 Q1 out MB11 9 Q2 out MB09 10 L in +3B 11 Q3 out MB08 13 S in GND 14 I3 in REGBUS08 15 I2 in REGBUS09 E51 1 1G in GND 2 B in EN1 3 1C3 in !MA08 4 1C2 in !MQ08 5 1C1 in !MD08 6 1C0 in !PC08 7 1Y out N$10 9 2Y out N$40 10 2C0 in !PC09 11 2C1 in !MD09 12 2C2 in !MQ09 13 2C3 in !MA09 14 A in EN2 15 2G in GND E52 1 A4 in !A08 2 S3 out !AD09 3 A3 in !B09 4 B3 in !A09 6 S2 out !AD10 7 B2 in !B10 8 A2 in !A10 9 S1 out !AD11 10 A1 in !A11 11 B1 in !B11 13 C0 in !CARRY_IN 14 C4 out !CARRY08 15 S4 out !AD08 16 B4 in !B08 E53 1 D3 in !ADLK 2 D2 in !AD11 3 D1 in !AD04 4 D0 in !AD10 5 Y out !REGBUS10 6 W out REGBUS10 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD10 13 D6 in !AND10 14 D5 in !AD08 15 D4 in !AD09 E54 1 R in +3C 2 I1 in N$19 3 I0 in N$22 4 D in !MQ07 5 Q0 out !MQ08 6 C in !MQ_LOAD 7 Q1 out !MQ09 9 Q2 out !MQ10 10 L in +3C 11 Q3 out !MQ11 13 S in RIGHT2 14 I3 in N$20 15 I2 in N$7 E55 1 R in !B_INIT 2 I1 in REGBUS11 3 I0 in REGBUS10 5 Q0 out AC10 6 C in !AC_LOAD 7 Q1 out AC11 9 Q2 out AC09 10 L in +3B 11 Q3 out AC08 13 S in GND 14 I3 in REGBUS08 15 I2 in REGBUS09 E56 1 A0 in N$43 2 B0 in N$43 3 F0 out !A11 4 F1 out !A10 5 B1 in N$42 6 A1 in N$42 7 S1 in EN0 9 S0 in EN0 10 A2 in N$10 11 B2 in N$10 12 F2 out !A08 13 F3 out !A09 14 B3 in N$40 15 A3 in N$40 E57 1 S1 in DATA_F 2 A0 in DATA08 3 F0 out !B08 5 A1 in DATA11 6 F1 out !B11 8 S0 in DATA_T 9 F2 out !B10 10 A2 in DATA10 12 F3 out !B09 13 A3 in DATA09 E58 1 D3 in !AD00 2 D2 in !ADLK 3 D1 in !AD05 4 D0 in !AD11 5 Y out !REGBUS11 6 W out REGBUS11 7 G in GND 9 C in RIGHT 10 B in LEFT 11 A in TWICE 12 D7 in !MD11 13 D6 in !AND11 14 D5 in !AD09 15 D4 in !AD10 E59 1 A0 in AC10 2 B0 in !MQ11 3 F0 out N$7 4 F1 out N$20 5 B1 in !MQ_DATA 6 A1 in AC11 7 S1 in !AL2MQ_ENA 9 S0 in !SHL_ENA 10 A2 in AC08 11 B2 in !MQ09 12 F2 out N$22 13 F3 out N$19 14 B3 in !MQ10 15 A3 in AC09 E60 1 A0 in AC09 2 B0 in !MQ09 3 F0 oc DATA09 4 F1 oc DATA08 5 B1 in !MQ08 6 A1 in AC08 7 S1 in !AC2BUS 9 S0 in !MQ2BUS 10 A2 in AC10 11 B2 in !MQ10 12 F2 oc DATA10 13 F3 oc DATA11 14 B3 in !MQ11 15 A3 in AC11 E61 1 I0 in MB08 2 I1 in AC08 3 O out !AND08 4 I0 in MB09 5 I1 in AC09 6 O out !AND09 8 O out !AND11 9 I0 in AC11 10 I1 in MB11 11 O out !AND10 12 I0 in AC10 13 I1 in MB10 E62 1 1G in GND 2 B in EN1 3 1C3 in !MA10 4 1C2 in !MQ10 5 1C1 in !MD10 6 1C0 in !PC10 7 1Y out N$42 9 2Y out N$43 10 2C0 in !PC11 11 2C1 in !MD11 12 2C2 in !MQ11 13 2C3 in !MA11 14 A in EN2 15 2G in GND E63 1 I in !MD_DIR 2 O out N$5 3 I in N$5 4 O out N$12 5 I in GND 6 O out +3B 8 O out RIGHT2 9 I in !RIGHT 10 O out +3C 11 I in GND 12 O out !B_INIT 13 I in INIT E64 1 I in GND 2 O out +3A 5 I in !MAC 6 O out N$1 8 O out RIGHT 9 I in !RIGHT 10 O out LEFT 11 I in !LEFT 12 O out TWICE 13 I in !TWICE E A1 P pas !MQ00-03EQ0 A2 P pas EN2 B1 P pas !AC04-11EQ0 B2 P pas DATA_T C1 P pas !CARRY_OUT C2 P pas EN0 D1 P pas DATA_F D2 P pas !MQ2BUS E2 P pas !MQ_LOAD F2 P pas EN1 L1 P pas !AC_LOAD M1 P pas AC01 N1 P pas AC00 P1 P pas AC02 R1 P pas AC03 S2 P pas !SHL_ENA T1 P pas !AL2MQ_ENA T2 P pas !AC2BUS H A1 P pas !MAC C1 P pas PAGEZ D1 P pas !PC_LOAD E1 P pas !CPMA_LOAD F1 P pas !MB_LOAD H1 P pas !MQ11 H2 P pas !RIGHT J1 P pas !MQ10 J2 P pas !LEFT K1 P pas !MQ04-11EQ0 K2 P pas !TWICE L1 P pas !ADLK M1 P pas !AD10 M2 P pas !CARRY_IN N1 P pas !AD11 P1 P pas !AD00 R1 P pas !AD01 U2 P pas !MQ_DATA V2 P pas !MQ00 R1 1 1 pas !SHL_ENA 2 2 pas VCC U$2 AA2 1 io VCC AC2 1 io GND AD1 1 io !MA00 AE1 1 io !MA01 AF1 1 io GND AF2 1 io GND AH1 1 io !MA02 AJ1 1 io !MA03 AK1 1 io !MD00 AK2 1 io !MD_DIR AL1 1 io !MD01 AM1 1 io !MD02 AN1 1 io GND AN2 1 io GND AP1 1 io !MD03 AR1 1 io DATA00 AS1 1 io DATA01 AT1 1 io GND AT2 1 io GND AU1 1 io DATA02 AV1 1 io DATA03 BA2 1 io VCC BC1 1 io GND BC2 1 io GND BD1 1 io !MA04 BE1 1 io !MA05 BF1 1 io GND BF2 1 io GND BH1 1 io !MA06 BJ1 1 io !MA07 BK1 1 io !MD04 BL1 1 io !MD05 BM1 1 io !MD06 BN1 1 io GND BN2 1 io GND BP1 1 io !MD07 BR1 1 io DATA04 BS1 1 io DATA05 BT1 1 io GND BT2 1 io GND BU1 1 io DATA06 BV1 1 io DATA07 CA2 1 io VCC CC1 1 io GND CF1 1 io GND CF2 1 io GND CN1 1 io GND CN2 1 io GND CR1 1 io INIT CT1 1 io GND CT2 1 io GND DC1 1 io GND DC2 1 io GND DD1 1 io !MA08 DE1 1 io !MA09 DF1 1 io GND DF2 1 io GND DH1 1 io !MA10 DJ1 1 io !MA11 DK1 1 io !MD08 DL1 1 io !MD09 DM1 1 io !MD10 DN2 1 io GND DP1 1 io !MD11 DR1 1 io DATA08 DS1 1 io DATA09 DT2 1 io GND DU1 1 io DATA10 DV1 1 io DATA11