// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// c18: c_us 
// c19: c_us 
// c20: c_us 
// c21: c_us 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c25: c_us 
// c26: c_us 
// c27: cpol_use 
// c29: cpol_use 
// c30: c_us 
// c31: c_us 
// c32: c_us 
// c33: c_us 
// e1: n8881n 
// n_t_37x = !(!ts4_l & !keycontrol_l); 
// n_t_37x = !(fe_fd_l & ts4fset_not_ms_dis); 
// data_f = !(!md06_l & op1ts3); 
// n_t_37x = !(n_t_36x & c1_l); 
// e2: n8881n 
// carry_in_l = !(skip1 & ts4fset_not_ms_dis); 
// ac2bus_l = !(n_t_56x & c2_l); 
// ac2bus_l = !(n_t_55x & !ts1_l); 
// carry_in_l = !(jmsets2 & skip1); 
// e3: n8881n 
// n_t_30x = !(op2ts3 & n_t_43x); 
// en1 = !(!ts4_l & d_not_jmp); 
// carry_in_l = !(bf_kc & !ts1_l); 
// en0 = !(!ts1_l & bf_kc); 
// e4: n8881n 
// n_t_35x = !(aceq0 & !md06_l); 
// md_dis = !(!ms_ir_dis_l & bk_dc_l); 
// carry_in_l = !(!md11_l & op1ts3); 
// link_l = !link; 
// e5: n8881n 
// ac2bus_l = !(!f_l & !ts2_l); 
// data_t = !(!ts2_l & !ms_ir_dis_l); 
// carry_in_l = !(!d_l & !ts2_l); 
// n_t_35x = !(ac00 & !md05_l); 
// e6: sn7404 
module m8310f (ac00, ac01, ac02, ac03, ac04_11eq0_l, ad00_l, ad01_l, ad10_l, ad11_l, ad_ld_d15_l, carry_out_l, fdset_l, link_data_l, mq00_03eq0_l, mq04_11eq0_l, n3b, n3va, n_t_26x, n_t_2x, ac0eqac1_l, ac2_ac3_l, ac2bus_l, ac_load_l, aceq0, bk_dc_l, bus_strobe_l, c0_l, c1_l, c2_l, carry_in_l, cpma_dis_l, cpma_load_l, data_f, data_t, en0, en1, en2, fe_fd_l, feset_l, fset_l, ind1, ind2, initialize, intinprog, ir0_l, ir1_l, ir2_l, keycontrol_l, la_enable_l, left_l, link_l, link_load_l, mac_l, malc_l, mb_load_l, md00_l, md01_l, md02_l, md03_l, md04_l, md05_l, md06_l, md07_l, md08_l, md09_l, md10_l, md11_l, md_dis, mq2bus_l, mq_load_l, mqeq0, ms_ir_dis_l, n15v, n3v, n_t_16x, n_t_17x, n_t_30x, n_t_34x, n_t_35x, n_t_37x, n_t_44x, n_t_6x, n_t_9x, ope, overflow_l, pagez, pause_l, pc_load_l, pulse_la, pwr_ok, right_l, rom_l, run, skip_l, tp1, tp2, tp3, tp4, ts1_l, ts2_l, ts3_l, ts4_l, twice_l);
input ac00;
input ac01;
input ac02;
input ac03;
input ac04_11eq0_l;
input ad00_l;
input ad01_l;
input ad10_l;
input ad11_l;
input ad_ld_d15_l;
input carry_out_l;
input fdset_l;
input link_data_l;
input mq00_03eq0_l;
input mq04_11eq0_l;
input n3b;
input n3va;
input n_t_26x;
input n_t_2x;
output ac0eqac1_l;
inout ac2_ac3_l;
output ac2bus_l;
output ac_load_l;
inout aceq0;
input bk_dc_l;
input bus_strobe_l;
input c0_l;
input c1_l;
input c2_l;
output carry_in_l;
input cpma_dis_l;
inout cpma_load_l;
output data_f;
inout data_t;
output en0;
inout en1;
inout en2;
inout fe_fd_l;
inout feset_l;
inout fset_l;
input ind1;
input ind2;
input initialize;
input intinprog;
inout ir0_l;
inout ir1_l;
inout ir2_l;
input keycontrol_l;
input la_enable_l;
inout left_l;
output link_l;
input link_load_l;
output reg mac_l;
input malc_l;
output mb_load_l;
input md00_l;
input md01_l;
input md02_l;
output md03_l;
input md04_l;
input md05_l;
input md06_l;
input md07_l;
input md08_l;
input md09_l;
input md10_l;
input md11_l;
output md_dis;
output mq2bus_l;
output mq_load_l;
output mqeq0;
input ms_ir_dis_l;
output n15v;
inout n3v;
inout n_t_16x;
output n_t_17x;
inout n_t_30x;
inout n_t_34x;
inout n_t_35x;
inout n_t_37x;
inout n_t_44x;
inout n_t_6x;
inout n_t_9x;
inout ope;
output overflow_l;
output pagez;
input pause_l;
output pc_load_l;
input pulse_la;
input pwr_ok;
inout right_l;
input rom_l;
input run;
input skip_l;
input tp1;
input tp2;
input tp3;
input tp4;
input ts1_l;
input ts2_l;
input ts3_l;
input ts4_l;
inout twice_l;

reg link_m;
reg mac_l_m;
reg n_t_60x_m;
reg n_t_61x_m;
reg n_t_62x_m;
reg n_t_73x_m;
reg n_t_77x_m;
reg n_t_78x_m;
reg ov_m;
reg skip1_m;

reg skip1;
reg link;
reg ov;
reg n_t_62x;
reg n_t_60x;
reg n_t_73x;
reg n_t_61x;
reg n_t_78x;
reg n_t_77x;
wire and_l;
wire ande_l;
wire andets3;
wire bf_kc;
wire d_l;
wire d_not_jmp;
wire dca_l;
wire dcae_l;
wire dcaets2;
wire dset_l;
wire e_l;
wire eset;
wire ets2_l;
wire ets3_l;
wire f_l;
wire fe_fd;
wire iot_l;
wire isz_l;
wire iszets2;
wire iszets3;
wire jmp_l;
wire jms_l;
wire jmse;
wire jmsets2;
wire jmsets3;
wire n_t_12x;
wire n_t_13x;
wire n_t_14x;
wire n_t_18x;
wire n_t_19x;
wire n_t_20x;
wire n_t_21x;
wire n_t_23x;
wire n_t_28x;
wire n_t_29x;
wire n_t_32x;
wire n_t_36x;
wire n_t_39x;
wire n_t_3x;
wire n_t_43x;
wire n_t_45x;
wire n_t_4x;
wire n_t_55x;
wire n_t_56x;
wire n_t_58x;
wire n_t_59x;
wire n_t_5x;
wire n_t_63x;
wire n_t_64x;
wire n_t_69x;
wire n_t_72x;
wire n_t_75x;
wire n_t_80x;
wire n_t_81x;
wire n_t_85x;
wire n_t_8x;
wire op1_l;
wire op1ts3;
wire op2ts3;
wire opets3;
wire opr_iot;
wire opr_l;
wire oprf;
wire tad_l;
wire tade_l;
wire tadets3;
wire tp4_not_malc;
wire ts4fset_not_ms_dis;
// e7: sn7420 
assign n_t_28x = ~(tade_l & dcae_l & ande_l & ~oprf);
assign n_t_4x = ~(~ts4_l & fe_fd_l & fset_l & ~f_l);
// e8: sn7405 
// en0 = en1; 
// en0 = en2; 
// en1 = en2; 
// n_t_37x = !jmsets2; 
// en1 = !tadets3; 
// carry_in_l = !iszets2; 
// e9: sn7412 
// ac2bus_l = !(!f_l & n_t_45x & !n_t_44x); 
// mq2bus_l = !(ind1 & !ts1_l & !ind2); 
// mq2bus_l = !(opets3 & !md05_l & pause_l); 
// e10: sn7405 
// ac2bus_l = !dcaets2; 
// data_t = !dcaets2; 
// en2 = en2; 
// data_f = !data_t; 
// data_t = !tadets3; 
// ac2bus_l = !tadets3; 
// e11: sn7412 
// data_t = !(!ts3_l & opr_iot & n_t_39x); 
// n_t_44x = !(!ts3_l & md04_l & oprf); 
// carry_in_l = !(rom_l & cpma_dis_l & jmsets3); 
// e12: sn7410 
assign n_t_39x = ~(~c0_l & c2_l & c1_l);
assign n_t_5x = ~(~jmp_l & ~ts3_l & ~f_l);
assign n_t_32x = ~(n_t_30x & ~skip1);
// e13: sn7412 
// mq_load_l = !(ope & !md07_l & tp3); 
// en1 = !(!d_l & !ts3_l & !jmp_l); 
// e14: sn74h04 
// e15: n8881n 
// n_t_17x = !(!pwr_ok & run); 
// pc_load_l = !(!bus_strobe_l & !c2_l); 
// ac_load_l = !(tp3 & n_t_28x); 
// ac_load_l = !(c2_l & !bus_strobe_l); 
// e16: sn7404 
// e17: sn7474 
always @(tp4, n_t_26x, n3b, cpma_dis_l)
  if (~n_t_26x) begin
    mac_l_m <= 1'b0;
  end else
  if (~n3b) begin
    mac_l_m <= 1'b1;
  end else
  if (~(tp4)) begin
    mac_l_m <= ~cpma_dis_l;
  end
always @(tp4, n_t_26x, n3b, mac_l_m)
  if (~n_t_26x) begin
    mac_l <= 1'b0;
  end else
  if (~n3b) begin
    mac_l <= 1'b1;
  end else
  if (tp4) begin
    mac_l <= mac_l_m;
  end
always @(tp3, n_t_34x, n3b, n_t_32x)
  if (~n_t_34x) begin
    skip1_m <= 1'b0;
  end else
  if (~n3b) begin
    skip1_m <= 1'b1;
  end else
  if (~(tp3)) begin
    skip1_m <= n_t_32x;
  end
always @(tp3, n_t_34x, n3b, skip1_m)
  if (~n_t_34x) begin
    skip1 <= 1'b0;
  end else
  if (~n3b) begin
    skip1 <= 1'b1;
  end else
  if (tp3) begin
    skip1 <= skip1_m;
  end
// e18: sn74h00 
assign n_t_3x = ~(n_t_5x & n_t_4x);
assign op2ts3 = ~(~(n_t_69x & ~ts3_l));
assign opets3 = ~(~(~ts3_l & ope));
assign n_t_80x = ~(n_t_85x & ac2_ac3_l);
// e19: sn7402 
assign mqeq0 = ~(mq04_11eq0_l
                  | mq00_03eq0_l);
assign ac2_ac3_l = ~(ac02
                      | ac03);
assign n_t_85x = ~(ac00
                    | ac01);
assign aceq0 = ~(n_t_80x
                  | ac04_11eq0_l);
// e20: sn7404 
// e21: sn74h00 
assign tp4_not_malc = ~(~(malc_l & tp4));
assign n_t_63x = ~(oprf & ~n_t_2x);
assign op1_l = ~(n_t_2x & oprf);
assign n_t_45x = ~(opets3 & ~md07_l);
// e22: sn7402 
assign n_t_69x = ~(n_t_63x
                    | ~md11_l);
assign ope = ~(n_t_63x
                | md11_l);
assign n_t_29x = ~(skip_l
                    | ~opr_iot);
assign n_t_36x = ~(pause_l
                    | c2_l);
// e23: n8881n 
// n_t_16x = !(!n_t_23x & n_t_14x); 
// right_l = !(!md08_l & op1ts3); 
// left_l = !(!md09_l & op1ts3); 
// twice_l = !(op1ts3 & !md10_l); 
// e24: sn74151 
assign n_t_13x = ~(n_t_16x & ~right_l & ~left_l & ~twice_l
                    | n_t_16x & ~right_l & ~left_l & twice_l
                    | ad10_l & ~right_l & left_l & ~twice_l
                    | ad11_l & ~right_l & left_l & twice_l
                    | ad01_l & right_l & ~left_l & ~twice_l
                    | ad00_l & right_l & ~left_l & twice_l
                    | n_t_16x & right_l & left_l & ~twice_l
                    | n_t_16x & right_l & left_l & twice_l);
// e25: sn7402 
assign n_t_55x = ~(ind2
                    | ind1);
assign n_t_56x = ~(n_t_58x
                    | pause_l);
assign n_t_58x = ~(c0_l
                    | c1_l);
assign op1ts3 = ~(ts3_l
                   | op1_l);
// e26: sn7404 
// e27: sn7405 
// cpma_load_l = !tp4_not_malc; 
// fe_fd_l = !fe_fd; 
// en0 = !jmsets3; 
// feset_l = !intinprog; 
// n_t_30x = !n_t_29x; 
// data_t = la_enable_l; 
// e28: sn7405 
// n_t_34x = !initialize; 
// right_l = !andets3; 
// left_l = !andets3; 
// left_l = !n_t_3x; 
// twice_l = !n_t_3x; 
// right_l = !n_t_3x; 
// e29: sp384n 
assign ets2_l = ts2_l
                 | e_l;
assign ets3_l = ts3_l
                 | e_l;
// e30: sn7420 
assign n_t_12x = ~(n_t_13x & ~n_t_23x & ~n_t_23x);
assign n_t_72x = ~(~opr_iot & ~f_l & n_t_2x & jmp_l);
// e31: sn7410 
assign ts4fset_not_ms_dis = ~(~(~fset_l & ms_ir_dis_l & ~ts4_l));
assign eset = ~(feset_l & n_t_72x & ~d_not_jmp);
assign n_t_75x = ~(~f_l & ~opr_iot & ~n_t_2x);
// e32: sn7400 
assign n_t_8x = ~(link_data_l & n_t_12x);
assign pagez = ~(~(n_t_3x & md04_l));
assign n_t_23x = ~(iot_l & ad_ld_d15_l);
// e33: sn7474 
always @(n_t_6x, initialize, n3va, n_t_8x)
  if (initialize) begin
    link_m <= 1'b0;
  end else
  if (~n3va) begin
    link_m <= 1'b1;
  end else
  if (~(n_t_6x)) begin
    link_m <= n_t_8x;
  end
always @(n_t_6x, initialize, n3va, link_m)
  if (initialize) begin
    link <= 1'b0;
  end else
  if (~n3va) begin
    link <= 1'b1;
  end else
  if (n_t_6x) begin
    link <= link_m;
  end
always @(tp2, n3va, n3va, carry_out_l)
  if (~n3va) begin
    ov_m <= 1'b0;
  end else
  if (~n3va) begin
    ov_m <= 1'b1;
  end else
  if (~(tp2)) begin
    ov_m <= carry_out_l;
  end
always @(tp2, n3va, n3va, ov_m)
  if (~n3va) begin
    ov <= 1'b0;
  end else
  if (~n3va) begin
    ov <= 1'b1;
  end else
  if (tp2) begin
    ov <= ov_m;
  end
// e34: sn7404 
// e35: sn74h00 
assign n_t_59x = ~(tp4_not_malc & intinprog);
assign opr_iot = ~(opr_l & iot_l);
assign n_t_64x = ~(tp2 & ~f_l);
assign d_not_jmp = ~(~(jmp_l & ~d_l));
// e36: sn74h04 
// e37: sn7402 
assign jmse = ~(e_l
                 | jms_l);
assign n_t_19x = ~(op1_l
                    | md05_l);
assign n_t_21x = ~(md07_l
                    | op1_l);
assign n_t_20x = ~(~link
                    | n_t_19x);
// e38: sn7486 
assign n_t_43x = md08_l
                  ^ n_t_35x;
assign ac0eqac1_l = ac00
                     ^ ac01;
assign n_t_14x = ~carry_out_l
                  ^ n_t_18x;
assign n_t_18x = n_t_20x
                  ^ n_t_21x;
// e39: sn7400 
assign bf_kc = ~(f_l & keycontrol_l);
assign dset_l = ~(~(n_t_75x & fdset_l));
assign fe_fd = ~(fdset_l & feset_l);
// e40: sn74h74 
always @(n_t_64x, n_t_59x, n3v, md02_l)
  if (~n_t_59x) begin
    n_t_62x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_62x_m <= 1'b1;
  end else
  if (~(~n_t_64x)) begin
    n_t_62x_m <= ~md02_l;
  end
always @(n_t_64x, n_t_59x, n3v, n_t_62x_m)
  if (~n_t_59x) begin
    n_t_62x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_62x <= 1'b1;
  end else
  if (~n_t_64x) begin
    n_t_62x <= n_t_62x_m;
  end
always @(n_t_64x, n3v, n_t_59x, md00_l)
  if (~n3v) begin
    n_t_60x_m <= 1'b0;
  end else
  if (~n_t_59x) begin
    n_t_60x_m <= 1'b1;
  end else
  if (~(~n_t_64x)) begin
    n_t_60x_m <= ~md00_l;
  end
always @(n_t_64x, n3v, n_t_59x, n_t_60x_m)
  if (~n3v) begin
    n_t_60x <= 1'b0;
  end else
  if (~n_t_59x) begin
    n_t_60x <= 1'b1;
  end else
  if (~n_t_64x) begin
    n_t_60x <= n_t_60x_m;
  end
// e41: sn7402 
assign jmsets2 = ~(jms_l
                    | ets2_l);
assign oprf = ~(opr_l
                 | f_l);
assign dcaets2 = ~(dca_l
                    | ets2_l);
assign jmsets3 = ~(jms_l
                    | ets3_l);
// e42: sn7400 
assign ande_l = ~(~e_l & ~and_l);
assign dcae_l = ~(~e_l & ~dca_l);
assign tade_l = ~(~tad_l & ~e_l);
assign n_t_81x = ~(tade_l & op1_l);
// e43: n8881n 
// n_t_6x = !n_t_9x; 
// n_t_35x = !(!md07_l & link); 
// n_t_9x = !(n_t_81x & tp3); 
// n_t_9x = link_load_l; 
// e44: n8881n 
// n3v = 'b'1; 
// ir2_l = !(ms_ir_dis_l & n_t_62x); 
// ir0_l = !(n_t_60x & ms_ir_dis_l); 
// ir1_l = !(n_t_61x & ms_ir_dis_l); 
// e45: sn74h74 
always @(cpma_load_l, n3v, n3v, eset)
  if (~n3v) begin
    n_t_73x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_73x_m <= 1'b1;
  end else
  if (~(~cpma_load_l)) begin
    n_t_73x_m <= eset;
  end
always @(cpma_load_l, n3v, n3v, n_t_73x_m)
  if (~n3v) begin
    n_t_73x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_73x <= 1'b1;
  end else
  if (~cpma_load_l) begin
    n_t_73x <= n_t_73x_m;
  end
always @(n_t_64x, n_t_59x, n3v, md01_l)
  if (~n_t_59x) begin
    n_t_61x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_61x_m <= 1'b1;
  end else
  if (~(~n_t_64x)) begin
    n_t_61x_m <= ~md01_l;
  end
always @(n_t_64x, n_t_59x, n3v, n_t_61x_m)
  if (~n_t_59x) begin
    n_t_61x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_61x <= 1'b1;
  end else
  if (~n_t_64x) begin
    n_t_61x <= n_t_61x_m;
  end
// e46: dec8251 
assign opr_l = ~(~ir2_l & ~ir1_l & ~ir0_l);
assign dca_l = ~(~ir2_l & ~ir1_l & ir0_l);
assign jmp_l = ~(~ir2_l & ir1_l & ~ir0_l);
assign tad_l = ~(~ir2_l & ir1_l & ir0_l);
assign iot_l = ~(ir2_l & ~ir1_l & ~ir0_l);
assign isz_l = ~(ir2_l & ~ir1_l & ir0_l);
assign jms_l = ~(ir2_l & ir1_l & ~ir0_l);
assign and_l = ~(ir2_l & ir1_l & ir0_l);
// e47: sn7404 
// e48: sn7404 
assign mb_load_l = ~tp2;
// e49: n8881n 
// fset_l = !(dset_l & !eset); 
// e_l = !(n_t_73x & ms_ir_dis_l); 
// d_l = !(n_t_77x & ms_ir_dis_l); 
// f_l = !(n_t_78x & ms_ir_dis_l); 
// e50: sn7474 
always @(cpma_load_l, n3v, n3v, fset_l)
  if (~n3v) begin
    n_t_78x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_78x_m <= 1'b1;
  end else
  if (~(~cpma_load_l)) begin
    n_t_78x_m <= ~fset_l;
  end
always @(cpma_load_l, n3v, n3v, n_t_78x_m)
  if (~n3v) begin
    n_t_78x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_78x <= 1'b1;
  end else
  if (~cpma_load_l) begin
    n_t_78x <= n_t_78x_m;
  end
always @(cpma_load_l, n3v, n3v, dset_l)
  if (~n3v) begin
    n_t_77x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_77x_m <= 1'b1;
  end else
  if (~(~cpma_load_l)) begin
    n_t_77x_m <= ~dset_l;
  end
always @(cpma_load_l, n3v, n3v, n_t_77x_m)
  if (~n3v) begin
    n_t_77x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_77x <= 1'b1;
  end else
  if (~cpma_load_l) begin
    n_t_77x <= n_t_77x_m;
  end
// e51: sn7402 
assign andets3 = ~(ets3_l
                    | and_l);
assign tadets3 = ~(ets3_l
                    | tad_l);
assign iszets2 = ~(ets2_l
                    | isz_l);
assign iszets3 = ~(isz_l
                    | ets3_l);
// e52: n8881n 
// n_t_34x = !(!f_l & tp1); 
// n_t_30x = !(ov & iszets3); 
// overflow_l = !(ov & !ts3_l); 
// cpma_load_l = !(pulse_la & keycontrol_l); 
// e53: n8881n 
// pc_load_l = !(!jmp_l & tp3); 
// pc_load_l = !(bf_kc & tp1); 
// pc_load_l = !(jmse & tp3); 
// n_t_34x = !(jmse & tp2); 
// open collector 'wire-or's 
assign ac2bus_l = (n_t_56x & c2_l)
                   | (n_t_55x & ~ts1_l)
                   | (~f_l & ~ts2_l)
                   | (~f_l & n_t_45x & ~n_t_44x)
                   | dcaets2
                   | tadets3? 1'b0: 1'bz;
assign ac_load_l = (tp3 & n_t_28x)
                    | (c2_l & ~bus_strobe_l)? 1'b0: 1'bz;
assign carry_in_l = (skip1 & ts4fset_not_ms_dis)
                     | (jmsets2 & skip1)
                     | (bf_kc & ~ts1_l)
                     | (~md11_l & op1ts3)
                     | (~d_l & ~ts2_l)
                     | iszets2
                     | (rom_l & cpma_dis_l & jmsets3)? 1'b0: 1'bz;
assign cpma_load_l = tp4_not_malc
                      | (pulse_la & keycontrol_l)? 1'b0: 1'bz;
assign d_l = ~((n_t_77x & ms_ir_dis_l));
assign data_f = (~md06_l & op1ts3)
                 | data_t? 1'b0: 1'bz;
assign data_t = (~ts2_l & ~ms_ir_dis_l)
                 | dcaets2
                 | tadets3
                 | (~ts3_l & opr_iot & n_t_39x)
                 | (~la_enable_l)? 1'b0: 1'bz;
assign e_l = ~((n_t_73x & ms_ir_dis_l));
assign en0 = (~ts1_l & bf_kc)
              | (~en1)
              | (~en2)
              | jmsets3? 1'b0: 1'bz;
assign en1 = (~ts4_l & d_not_jmp)
              | (~en2)
              | tadets3
              | (~d_l & ~ts3_l & ~jmp_l)? 1'b0: 1'bz;
assign en2 = ~(~(~n_t_37x))? ~(~n_t_37x): 1'bz;
assign f_l = ~((n_t_78x & ms_ir_dis_l));
assign fe_fd_l = fe_fd? ~fe_fd: 1'bz;
assign feset_l = intinprog? ~intinprog: 1'bz;
assign fset_l = (dset_l & ~eset)? 1'b0: 1'bz;
assign ir0_l = (n_t_60x & ms_ir_dis_l)? 1'b0: 1'bz;
assign ir1_l = (n_t_61x & ms_ir_dis_l)? 1'b0: 1'bz;
assign ir2_l = (ms_ir_dis_l & n_t_62x)? 1'b0: 1'bz;
assign left_l = (~md09_l & op1ts3)
                 | andets3
                 | n_t_3x? 1'b0: 1'bz;
assign link_l = link? ~link: 1'bz;
assign md_dis = (~ms_ir_dis_l & bk_dc_l)? 1'b0: 1'bz;
assign mq2bus_l = (ind1 & ~ts1_l & ~ind2)
                   | (opets3 & ~md05_l & pause_l)? 1'b0: 1'bz;
assign mq_load_l = (ope & ~md07_l & tp3)? 1'b0: 1'bz;
assign n3v = 1'b0? 1'b1: 1'bz;
assign n_t_16x = (~n_t_23x & n_t_14x)? 1'b0: 1'bz;
assign n_t_17x = (~pwr_ok & run)? 1'b0: 1'bz;
assign n_t_30x = (op2ts3 & n_t_43x)
                  | n_t_29x
                  | (ov & iszets3)? 1'b0: 1'bz;
assign n_t_34x = initialize
                  | (~f_l & tp1)
                  | (jmse & tp2)? 1'b0: 1'bz;
assign n_t_35x = (aceq0 & ~md06_l)
                  | (ac00 & ~md05_l)
                  | (~md07_l & link)? 1'b0: 1'bz;
assign n_t_37x = (~ts4_l & ~keycontrol_l)
                  | (fe_fd_l & ts4fset_not_ms_dis)
                  | (n_t_36x & c1_l)
                  | jmsets2? 1'b0: 1'bz;
assign n_t_44x = (~ts3_l & md04_l & oprf)? 1'b0: 1'bz;
assign n_t_6x = n_t_9x? ~n_t_9x: 1'bz;
assign n_t_9x = (n_t_81x & tp3)
                 | (~link_load_l)? 1'b0: 1'bz;
assign overflow_l = (ov & ~ts3_l)? 1'b0: 1'bz;
assign pc_load_l = (~bus_strobe_l & ~c2_l)
                    | (~jmp_l & tp3)
                    | (bf_kc & tp1)
                    | (jmse & tp3)? 1'b0: 1'bz;
assign right_l = (~md08_l & op1ts3)
                  | andets3
                  | n_t_3x? 1'b0: 1'bz;
assign twice_l = (op1ts3 & ~md10_l)
                  | n_t_3x? 1'b0: 1'bz;
endmodule