// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: cpol_use 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: cpol_use 
// c12: cpol_use 
// c13: cpol_use 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// c18: c_us 
// c19: cpol_use 
// c20: c_us 
// c21: c_us 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c25: c_us 
// c26: cpol_use 
// c27: c_us 
// c28: c_us 
// c29: c_us 
// c30: c_us 
// c31: c_us 
// c32: c_us 
// c33: cpol_use 
// e1: sn7400 
module m8320d (brk_cycle_l, brk_d_ctl_l, brk_in_prog_l, bus_strobe_l, c0_l, c1_l, c2_l, cpma_disabl_l, d_l, data0_l, data10_l, data11_l, data1_l, data2_l, data3_l, data4_l, data5_l, data6_l, data7_l, data8_l, data9_l, e_l, ema0_l, ema1_l, ema2_l, f_l, f_set_l, ind1_l, ind2_l, inhibit, initialize, int_in_prog, int_req_l, int_strobe, int_strobe_l, internal_io_l, ir0_l, ir1_l, ir2_l, key_ctl_l, la_enable_l, link_data_l, link_l, link_load_l, ma0_l, ma10_l, ma11_l, ma1_l, ma2_l, ma3_l, ma4_l, ma5_l, ma6_l, ma7_l, ma8_l, ma9_l, mams_l_ctl_l, md0_l, md10_l, md11_l, md1_l, md2_l, md3_l, md4_l, md5_l, md6_l, md7_l, md8_l, md9_l, mem_dir_in_l, mem_start_l, ms_ir_disabl_l, n15v, n_t_16x, n_t_24x, n_t_35x, not_lst_xfr_l, overflow_l, pause_l, power_ok, pulse_la, res1, res2, return, rom_addr_l, run_l, skip_l, source, stop_l, strobe, sw_l, tp1, tp2, tp2_l, tp3, tp4, tp4_l, ts1_l, ts2_l, ts3_l, ts4_l, user_mode_l, write);
output brk_cycle_l;
output brk_d_ctl_l;
output brk_in_prog_l;
output bus_strobe_l;
output c0_l;
output c1_l;
output c2_l;
output cpma_disabl_l;
output d_l;
output data0_l;
output data10_l;
output data11_l;
output data1_l;
output data2_l;
output data3_l;
output data4_l;
output data5_l;
output data6_l;
output data7_l;
output data8_l;
output data9_l;
output e_l;
output ema0_l;
output ema1_l;
output ema2_l;
output f_l;
output f_set_l;
output ind1_l;
output ind2_l;
output inhibit;
output initialize;
output int_in_prog;
output int_req_l;
input int_strobe;
output int_strobe_l;
output internal_io_l;
output ir0_l;
output ir1_l;
output ir2_l;
output key_ctl_l;
output la_enable_l;
output link_data_l;
output link_l;
output link_load_l;
output ma0_l;
output ma10_l;
output ma11_l;
output ma1_l;
output ma2_l;
output ma3_l;
output ma4_l;
output ma5_l;
output ma6_l;
output ma7_l;
output ma8_l;
output ma9_l;
output mams_l_ctl_l;
output md0_l;
output md10_l;
output md11_l;
output md1_l;
output md2_l;
output md3_l;
output md4_l;
output md5_l;
output md6_l;
output md7_l;
output md8_l;
output md9_l;
output mem_dir_in_l;
output mem_start_l;
output ms_ir_disabl_l;
output n15v;
output n_t_16x;
output n_t_24x;
output n_t_35x;
output not_lst_xfr_l;
output overflow_l;
output pause_l;
output power_ok;
output pulse_la;
output res1;
output res2;
output return;
output rom_addr_l;
output run_l;
output skip_l;
output source;
output stop_l;
output strobe;
output sw_l;
output tp1;
input tp2;
output tp2_l;
output tp3;
input tp4;
output tp4_l;
output ts1_l;
output ts2_l;
output ts3_l;
output ts4_l;
output user_mode_l;
output write;


assign tp4_l = ~tp4;
assign tp2_l = ~tp2;
assign int_strobe_l = ~int_strobe;
// open collector 'wire-or's 
endmodule