// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// c18: c_us 
// c19: c_us 
// c20: c_us 
// c21: c_us 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c25: c_us 
// c26: c_us 
// c27: c_us 
// c28: c_us 
// c29: c_us 
// c30: c_us 
// c31: c_us 
// c32: c_us 
// c33: c_us 
// c34: c_us 
// c35: c_us 
// c36: c_us 
// c37: c_us 
// c38: c_us 
// c39: c_us 
// c40: c_us 
// c41: c_us 
// c42: c_us 
// c43: c_us 
// c44: c_us 
// c45: c_us 
// c46: c_us 
// c47: c_us 
// c48: c_us 
// c49: c_us 
// c50: c_us 
// c51: c_us 
// c52: c_us 
// c53: c_us 
// c54: c_us 
// c55: c_us 
// c56: c_us 
// c59: cpol_use 
// c60: cpol_use 
// c61: cpol_use 
// c62: cpol_use 
// c63: cpol_use 
// e1: dec8242 
// n_t_20x = !(!n_t_17x & !n_t_12x
//        # n_t_17x & n_t_12x); 
// n_t_20x = !(!n_t_14x & !n_t_9x
//        # n_t_14x & n_t_9x); 
// n_t_20x = !(!n_t_10x & !n_t_15x
//        # n_t_10x & n_t_15x); 
// n_t_20x = !(!n_t_11x & !n_t_16x
//        # n_t_11x & n_t_16x); 
// e2: dec8242 
// n_t_19x = !(!n_t_18x & !n_t_6x
//        # n_t_18x & n_t_6x); 
// n_t_19x = !(!n_t_7x & !n_t_1x
//        # n_t_7x & n_t_1x); 
// n_t_20x = !(!n_t_8x & !n_t_7x
//        # n_t_8x & n_t_7x); 
// n_t_20x = !(!n_t_13x & !n_t_18x
//        # n_t_13x & n_t_18x); 
// e3: sn7400 
module m8655b (b1, b2, b3, bd96_192, clko_en, evn, fill, n3v3, n_t_10x, n_t_112x, n_t_11x, n_t_122x, n_t_12x, n_t_139x, n_t_13x, n_t_144x, n_t_1x, n_t_2x, n_t_3x, n_t_4x, n_t_5x, n_t_6x, n_t_8x, n_t_9x, nb1, nb2, np, r=150, swd, tclki, test_sync, trans_246_l, tsb, c0_l, c1_l, data00_l, data01_l, data02_l, data03_l, data04_l, data05_l, data06_l, data07_l, data08_l, data09_l, data10_l, data11_l, eia_in, eia_out, framing_err, initialize, int_rqst_l, internal_io_l, io_pause_l, lf_decoded_l, md03, md04, md05, md06, md07, md08, md09, md10, md11, n15v, n_t_100x, n_t_101x, n_t_102x, n_t_118x, n_t_126x, n_t_133x, n_t_19x, n_t_20x, n_t_50x, n_t_59x, n_t_60x, n_t_89x, n_t_96x, n_t_97x, n_t_98x, n_t_99x, overrun_err, parity_err, power_ok, rd0, rd1, rd2, rd3, rd4, rd5, rd6, rd7, reader_run, reader_run_or, recv_5, reset_dav_l, rtsdtr, rx20ma_data, rx_20ma, rx_20ma_or, rx_clk, rx_data, rx_data_av, serial_in, serial_out, skip_l, tclko, tp3, tx_20ma, tx_20ma_or, tx_buf_empty, tx_clk, tx_clk_l, txd_strobe, xr);
input b1;
input b2;
input b3;
input bd96_192;
input clko_en;
output evn;
input fill;
input n3v3;
input n_t_10x;
output n_t_112x;
input n_t_11x;
output n_t_122x;
input n_t_12x;
input n_t_139x;
input n_t_13x;
input n_t_144x;
input n_t_1x;
input n_t_2x;
input n_t_3x;
input n_t_4x;
input n_t_5x;
input n_t_6x;
input n_t_8x;
input n_t_9x;
output nb1;
output nb2;
output np;
output r=150;
input swd;
input tclki;
input test_sync;
input trans_246_l;
output tsb;
inout c0_l;
output c1_l;
output data00_l;
output data01_l;
output data02_l;
output data03_l;
inout data04_l;
inout data05_l;
inout data06_l;
inout data07_l;
inout data08_l;
inout data09_l;
inout data10_l;
inout data11_l;
output eia_in;
output eia_out;
input framing_err;
input initialize;
output int_rqst_l;
output internal_io_l;
input io_pause_l;
inout lf_decoded_l;
input md03;
input md04;
input md05;
input md06;
input md07;
input md08;
input md09;
input md10;
input md11;
output n15v;
inout reg n_t_100x;
output reg n_t_101x;
inout reg n_t_102x;
output n_t_118x;
output n_t_126x;
inout n_t_133x;
inout n_t_19x;
inout n_t_20x;
input n_t_50x;
inout reg n_t_59x;
inout reg n_t_60x;
inout reg n_t_89x;
inout reg n_t_96x;
inout reg n_t_97x;
inout reg n_t_98x;
inout reg n_t_99x;
input overrun_err;
input parity_err;
input power_ok;
input rd0;
input rd1;
input rd2;
input rd3;
input rd4;
input rd5;
input rd6;
input rd7;
output reader_run;
output reader_run_or;
inout recv_5;
output reset_dav_l;
output rtsdtr;
inout rx20ma_data;
output rx_20ma;
output rx_20ma_or;
inout rx_clk;
output rx_data;
input rx_data_av;
output serial_in;
input serial_out;
output skip_l;
inout tclko;
input tp3;
output tx_20ma;
output tx_20ma_or;
input tx_buf_empty;
inout tx_clk;
output tx_clk_l;
inout txd_strobe;
output xr;

reg bd110_m;
reg bd1200_m;
reg bd150_m;
reg bd2400_m;
reg bd300_m;
reg bd4800_m;
reg bd600_m;
reg filch_h_m;
reg gdollar_0_m;
reg gdollar_1_m;
reg gdollar_2_m;
reg gdollar_3_m;
reg gdollar_4_m;
reg gdollar_5_m;
reg gdollar_6_m;
reg gdollar_7_m;
reg int_enab_h_m;
reg n_t_100x_m;
reg n_t_101x_m;
reg n_t_102x_m;
reg n_t_114x_m;
reg n_t_116x_m;
reg n_t_117x_m;
reg n_t_34x_m;
reg n_t_38x_m;
reg n_t_52x_m;
reg n_t_53x_m;
reg n_t_56x_m;
reg n_t_57x_m;
reg n_t_59x_m;
reg n_t_60x_m;
reg n_t_66x_m;
reg n_t_67x_m;
reg n_t_68x_m;
reg n_t_73x_m;
reg n_t_76x_m;
reg n_t_77x_m;
reg n_t_78x_m;
reg n_t_80x_m;
reg n_t_89x_m;
reg n_t_96x_m;
reg n_t_97x_m;
reg n_t_98x_m;
reg n_t_99x_m;
reg p1_18us_m;
reg rflag_l_m;
reg stat_enab_l_m;
reg sync_l_m;
reg tflag_h_m;

reg n_t_52x;
reg n_t_53x;
reg n_t_73x;
reg p1_18us;
reg n_t_56x;
reg gdollar_0;
reg gdollar_1;
reg n_t_57x;
reg n_t_66x;
reg gdollar_2;
reg gdollar_3;
reg n_t_67x;
reg bd4800;
reg bd2400;
reg n_t_68x;
reg gdollar_4;
reg gdollar_5;
reg bd110;
reg bd1200;
reg bd600;
reg bd300;
reg bd150;
reg n_t_34x;
reg n_t_38x;
reg rflag_l;
reg sync_l;
reg n_t_117x;
reg n_t_76x;
reg n_t_78x;
reg n_t_77x;
reg n_t_80x;
reg n_t_114x;
reg gdollar_6;
reg gdollar_7;
reg n_t_116x;
reg int_enab_h;
reg stat_enab_l;
reg tflag_h;
reg filch_h;
wire count_fillchar;
wire has_error;
wire io_kcf_l;
wire io_rdrrun_l;
wire io_read_h;
wire io_tcf_l;
wire io_tpc_l;
wire n_t_110x;
wire n_t_113x;
wire n_t_145x;
wire n_t_146x;
wire n_t_14x;
wire n_t_15x;
wire n_t_16x;
wire n_t_17x;
wire n_t_18x;
wire n_t_21x;
wire n_t_22x;
wire n_t_23x;
wire n_t_25x;
wire n_t_26x;
wire n_t_28x;
wire n_t_31x;
wire n_t_32x;
wire n_t_33x;
wire n_t_35x;
wire n_t_39x;
wire n_t_40x;
wire n_t_41x;
wire n_t_42x;
wire n_t_47x;
wire n_t_48x;
wire n_t_49x;
wire n_t_54x;
wire n_t_55x;
wire n_t_58x;
wire n_t_61x;
wire n_t_62x;
wire n_t_63x;
wire n_t_65x;
wire n_t_69x;
wire n_t_70x;
wire n_t_71x;
wire n_t_72x;
wire n_t_74x;
wire n_t_7x;
wire n_t_83x;
wire n_t_84x;
wire n_t_85x;
wire n_t_86x;
wire n_t_87x;
wire n_t_88x;
wire n_t_90x;
wire n_t_91x;
wire n_t_92x;
wire n_t_93x;
wire recv_0;
wire recv_1;
wire recv_246;
wire rx20ma_data_l;
wire selected_h;
wire trans_0;
wire trans_1;
wire trans_246;
wire trans_5;
assign n_t_49x = ~(tclki & tclko);
assign tclko = ~(clko_en & n_t_50x);
// e5: dec8242 
// n_t_19x = !(!n_t_17x & !n_t_5x
//        # n_t_17x & n_t_5x); 
// n_t_19x = !(!n_t_14x & !n_t_2x
//        # n_t_14x & n_t_2x); 
// n_t_19x = !(!n_t_3x & !n_t_15x
//        # n_t_3x & n_t_15x); 
// n_t_19x = !(!n_t_4x & !n_t_16x
//        # n_t_4x & n_t_16x); 
// e7: sn7486 
assign n_t_58x = n_t_60x
                  ^ n_t_57x;
assign n_t_55x = n_t_57x
                  ^ n_t_49x;
assign n_t_54x = n_t_53x
                  ^ n_t_49x;
assign n_t_65x = n_t_67x
                  ^ p1_18us;
// e8: sn7493 
always @(n_t_54x, n3v3, sync_l, n_t_52x)
  if (n3v3 & sync_l) begin
    n_t_52x_m <= 1'b0;
  end else
  if (~(~n_t_54x)) begin
    n_t_52x_m <= ~n_t_52x;
  end
always @(n_t_54x, n3v3, sync_l, n_t_52x_m)
  if (n3v3 & sync_l) begin
    n_t_52x <= 1'b0;
  end else
  if (~n_t_54x) begin
    n_t_52x <= n_t_52x_m;
  end
always @(n_t_52x, n3v3, sync_l, n_t_53x)
  if (n3v3 & sync_l) begin
    n_t_53x_m <= 1'b0;
  end else
  if (~(~n_t_52x)) begin
    n_t_53x_m <= ~n_t_53x;
  end
always @(n_t_52x, n3v3, sync_l, n_t_53x_m)
  if (n3v3 & sync_l) begin
    n_t_53x <= 1'b0;
  end else
  if (~n_t_52x) begin
    n_t_53x <= n_t_53x_m;
  end
always @(n_t_53x, n3v3, sync_l, n_t_73x)
  if (n3v3 & sync_l) begin
    n_t_73x_m <= 1'b0;
  end else
  if (~(~n_t_53x)) begin
    n_t_73x_m <= ~n_t_73x;
  end
always @(n_t_53x, n3v3, sync_l, n_t_73x_m)
  if (n3v3 & sync_l) begin
    n_t_73x <= 1'b0;
  end else
  if (~n_t_53x) begin
    n_t_73x <= n_t_73x_m;
  end
always @(n_t_73x, n3v3, sync_l, p1_18us)
  if (n3v3 & sync_l) begin
    p1_18us_m <= 1'b0;
  end else
  if (~(~n_t_73x)) begin
    p1_18us_m <= ~p1_18us;
  end
always @(n_t_73x, n3v3, sync_l, p1_18us_m)
  if (n3v3 & sync_l) begin
    p1_18us <= 1'b0;
  end else
  if (~n_t_73x) begin
    p1_18us <= p1_18us_m;
  end
// e9: sn7492 
always @(n_t_55x, sync_l, n3v3, n_t_56x)
  if (sync_l & n3v3) begin
    n_t_56x_m <= 1'b0;
  end else
  if (~(~n_t_55x)) begin
    n_t_56x_m <= ~n_t_56x;
  end
always @(n_t_55x, sync_l, n3v3, n_t_56x_m)
  if (sync_l & n3v3) begin
    n_t_56x <= 1'b0;
  end else
  if (~n_t_55x) begin
    n_t_56x <= n_t_56x_m;
  end
always @(n_t_56x, sync_l, n3v3, n_t_57x, gdollar_1, gdollar_0)
  if (sync_l & n3v3
                       | n_t_57x & gdollar_1) begin
    gdollar_0_m <= 1'b0;
  end else
  if (~(~n_t_56x)) begin
    gdollar_0_m <= ~gdollar_0;
  end
always @(n_t_56x, sync_l, n3v3, n_t_57x, gdollar_1, gdollar_0_m)
  if (sync_l & n3v3
                       | n_t_57x & gdollar_1) begin
    gdollar_0 <= 1'b0;
  end else
  if (~n_t_56x) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(gdollar_1, sync_l, n3v3, n_t_57x, gdollar_1, gdollar_1)
  if (sync_l & n3v3
                       | n_t_57x & gdollar_1) begin
    gdollar_1_m <= 1'b0;
  end else
  if (~(~gdollar_1)) begin
    gdollar_1_m <= ~gdollar_1;
  end
always @(gdollar_1, sync_l, n3v3, n_t_57x, gdollar_1, gdollar_1_m)
  if (sync_l & n3v3
                       | n_t_57x & gdollar_1) begin
    gdollar_1 <= 1'b0;
  end else
  if (~gdollar_1) begin
    gdollar_1 <= gdollar_1_m;
  end
always @(n_t_57x, sync_l, n3v3, n_t_57x, gdollar_1, n_t_57x)
  if (sync_l & n3v3
                     | n_t_57x & gdollar_1) begin
    n_t_57x_m <= 1'b0;
  end else
  if (~(~n_t_57x)) begin
    n_t_57x_m <= ~n_t_57x;
  end
always @(n_t_57x, sync_l, n3v3, n_t_57x, gdollar_1, n_t_57x_m)
  if (sync_l & n3v3
                     | n_t_57x & gdollar_1) begin
    n_t_57x <= 1'b0;
  end else
  if (~n_t_57x) begin
    n_t_57x <= n_t_57x_m;
  end
// e10: sp384n 
assign n_t_15x = md05
                  | io_pause_l;
assign n_t_16x = io_pause_l
                  | md06;
assign n_t_17x = md07
                  | io_pause_l;
assign n_t_14x = io_pause_l
                  | md04;
// e11: sn7401 
// data03_l = !(overrun_err & n_t_110x); 
// data02_l = !(framing_err & n_t_110x); 
// data00_l = !(has_error & n_t_110x); 
// data01_l = !(parity_err & n_t_110x); 
// e12: sp384n 
assign selected_h = n_t_19x
                     | n_t_20x;
assign n_t_18x = md08
                  | io_pause_l;
assign n_t_7x = io_pause_l
                 | md03;
// e13: n8815 
assign has_error = overrun_err
                    | framing_err
                    | parity_err;
assign io_read_h = ~(~n_t_22x
                      | io_pause_l
                      | recv_246);
// e14: sn7493 
always @(n_t_65x, n3v3, sync_l, n_t_66x)
  if (n3v3 & sync_l) begin
    n_t_66x_m <= 1'b0;
  end else
  if (~(~n_t_65x)) begin
    n_t_66x_m <= ~n_t_66x;
  end
always @(n_t_65x, n3v3, sync_l, n_t_66x_m)
  if (n3v3 & sync_l) begin
    n_t_66x <= 1'b0;
  end else
  if (~n_t_65x) begin
    n_t_66x <= n_t_66x_m;
  end
always @(n_t_66x, n3v3, sync_l, gdollar_2)
  if (n3v3 & sync_l) begin
    gdollar_2_m <= 1'b0;
  end else
  if (~(~n_t_66x)) begin
    gdollar_2_m <= ~gdollar_2;
  end
always @(n_t_66x, n3v3, sync_l, gdollar_2_m)
  if (n3v3 & sync_l) begin
    gdollar_2 <= 1'b0;
  end else
  if (~n_t_66x) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(gdollar_2, n3v3, sync_l, gdollar_3)
  if (n3v3 & sync_l) begin
    gdollar_3_m <= 1'b0;
  end else
  if (~(~gdollar_2)) begin
    gdollar_3_m <= ~gdollar_3;
  end
always @(gdollar_2, n3v3, sync_l, gdollar_3_m)
  if (n3v3 & sync_l) begin
    gdollar_3 <= 1'b0;
  end else
  if (~gdollar_2) begin
    gdollar_3 <= gdollar_3_m;
  end
always @(gdollar_3, n3v3, sync_l, n_t_67x)
  if (n3v3 & sync_l) begin
    n_t_67x_m <= 1'b0;
  end else
  if (~(~gdollar_3)) begin
    n_t_67x_m <= ~n_t_67x;
  end
always @(gdollar_3, n3v3, sync_l, n_t_67x_m)
  if (n3v3 & sync_l) begin
    n_t_67x <= 1'b0;
  end else
  if (~gdollar_3) begin
    n_t_67x <= n_t_67x_m;
  end
// e15: sn7493 
always @(n_t_58x, sync_l, n3v3, n_t_59x)
  if (sync_l & n3v3) begin
    n_t_59x_m <= 1'b0;
  end else
  if (~(~n_t_58x)) begin
    n_t_59x_m <= ~n_t_59x;
  end
always @(n_t_58x, sync_l, n3v3, n_t_59x_m)
  if (sync_l & n3v3) begin
    n_t_59x <= 1'b0;
  end else
  if (~n_t_58x) begin
    n_t_59x <= n_t_59x_m;
  end
always @(n_t_59x, sync_l, n3v3, n_t_60x)
  if (sync_l & n3v3) begin
    n_t_60x_m <= 1'b0;
  end else
  if (~(~n_t_59x)) begin
    n_t_60x_m <= ~n_t_60x;
  end
always @(n_t_59x, sync_l, n3v3, n_t_60x_m)
  if (sync_l & n3v3) begin
    n_t_60x <= 1'b0;
  end else
  if (~n_t_59x) begin
    n_t_60x <= n_t_60x_m;
  end
always @(n_t_60x, sync_l, n3v3, bd4800)
  if (sync_l & n3v3) begin
    bd4800_m <= 1'b0;
  end else
  if (~(~n_t_60x)) begin
    bd4800_m <= ~bd4800;
  end
always @(n_t_60x, sync_l, n3v3, bd4800_m)
  if (sync_l & n3v3) begin
    bd4800 <= 1'b0;
  end else
  if (~n_t_60x) begin
    bd4800 <= bd4800_m;
  end
always @(bd4800, sync_l, n3v3, bd2400)
  if (sync_l & n3v3) begin
    bd2400_m <= 1'b0;
  end else
  if (~(~bd4800)) begin
    bd2400_m <= ~bd2400;
  end
always @(bd4800, sync_l, n3v3, bd2400_m)
  if (sync_l & n3v3) begin
    bd2400 <= 1'b0;
  end else
  if (~bd4800) begin
    bd2400 <= bd2400_m;
  end
// e16: sn7404 
assign n_t_61x = ~r=;
// e17: sn7493 
always @(n_t_67x, n3v3, sync_l, n_t_68x)
  if (n3v3 & sync_l) begin
    n_t_68x_m <= 1'b0;
  end else
  if (~(~n_t_67x)) begin
    n_t_68x_m <= ~n_t_68x;
  end
always @(n_t_67x, n3v3, sync_l, n_t_68x_m)
  if (n3v3 & sync_l) begin
    n_t_68x <= 1'b0;
  end else
  if (~n_t_67x) begin
    n_t_68x <= n_t_68x_m;
  end
always @(n_t_68x, n3v3, sync_l, gdollar_4)
  if (n3v3 & sync_l) begin
    gdollar_4_m <= 1'b0;
  end else
  if (~(~n_t_68x)) begin
    gdollar_4_m <= ~gdollar_4;
  end
always @(n_t_68x, n3v3, sync_l, gdollar_4_m)
  if (n3v3 & sync_l) begin
    gdollar_4 <= 1'b0;
  end else
  if (~n_t_68x) begin
    gdollar_4 <= gdollar_4_m;
  end
always @(gdollar_4, n3v3, sync_l, gdollar_5)
  if (n3v3 & sync_l) begin
    gdollar_5_m <= 1'b0;
  end else
  if (~(~gdollar_4)) begin
    gdollar_5_m <= ~gdollar_5;
  end
always @(gdollar_4, n3v3, sync_l, gdollar_5_m)
  if (n3v3 & sync_l) begin
    gdollar_5 <= 1'b0;
  end else
  if (~gdollar_4) begin
    gdollar_5 <= gdollar_5_m;
  end
always @(gdollar_5, n3v3, sync_l, bd110)
  if (n3v3 & sync_l) begin
    bd110_m <= 1'b0;
  end else
  if (~(~gdollar_5)) begin
    bd110_m <= ~bd110;
  end
always @(gdollar_5, n3v3, sync_l, bd110_m)
  if (n3v3 & sync_l) begin
    bd110 <= 1'b0;
  end else
  if (~gdollar_5) begin
    bd110 <= bd110_m;
  end
// e18: sn7493 
always @(bd2400, sync_l, n3v3, bd1200)
  if (sync_l & n3v3) begin
    bd1200_m <= 1'b0;
  end else
  if (~(~bd2400)) begin
    bd1200_m <= ~bd1200;
  end
always @(bd2400, sync_l, n3v3, bd1200_m)
  if (sync_l & n3v3) begin
    bd1200 <= 1'b0;
  end else
  if (~bd2400) begin
    bd1200 <= bd1200_m;
  end
always @(bd1200, sync_l, n3v3, bd600)
  if (sync_l & n3v3) begin
    bd600_m <= 1'b0;
  end else
  if (~(~bd1200)) begin
    bd600_m <= ~bd600;
  end
always @(bd1200, sync_l, n3v3, bd600_m)
  if (sync_l & n3v3) begin
    bd600 <= 1'b0;
  end else
  if (~bd1200) begin
    bd600 <= bd600_m;
  end
always @(bd600, sync_l, n3v3, bd300)
  if (sync_l & n3v3) begin
    bd300_m <= 1'b0;
  end else
  if (~(~bd600)) begin
    bd300_m <= ~bd300;
  end
always @(bd600, sync_l, n3v3, bd300_m)
  if (sync_l & n3v3) begin
    bd300 <= 1'b0;
  end else
  if (~bd600) begin
    bd300 <= bd300_m;
  end
always @(bd300, sync_l, n3v3, bd150)
  if (sync_l & n3v3) begin
    bd150_m <= 1'b0;
  end else
  if (~(~bd300)) begin
    bd150_m <= ~bd150;
  end
always @(bd300, sync_l, n3v3, bd150_m)
  if (sync_l & n3v3) begin
    bd150 <= 1'b0;
  end else
  if (~bd300) begin
    bd150 <= bd150_m;
  end
// e20: sn7474 
always @(io_kcf_l, n_t_35x, n3v3, n3v3)
  if (~n_t_35x) begin
    n_t_34x_m <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_34x_m <= 1'b1;
  end else
  if (~(io_kcf_l)) begin
    n_t_34x_m <= n3v3;
  end
always @(io_kcf_l, n_t_35x, n3v3, n_t_34x_m)
  if (~n_t_35x) begin
    n_t_34x <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_34x <= 1'b1;
  end else
  if (io_kcf_l) begin
    n_t_34x <= n_t_34x_m;
  end
always @(p1_18us, n_t_34x, n3v3, n_t_34x)
  if (~n_t_34x) begin
    n_t_38x_m <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_38x_m <= 1'b1;
  end else
  if (~(~p1_18us)) begin
    n_t_38x_m <= n_t_34x;
  end
always @(p1_18us, n_t_34x, n3v3, n_t_38x_m)
  if (~n_t_34x) begin
    n_t_38x <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_38x <= 1'b1;
  end else
  if (~p1_18us) begin
    n_t_38x <= n_t_38x_m;
  end
assign reset_dav_l = ~n_t_38x;
// e21: sn7400 
assign rx_clk = ~(n_t_63x & n_t_62x);
assign n_t_35x = ~(p1_18us & n_t_38x);
assign n_t_62x = ~(n_t_61x & bd150);
assign n_t_63x = ~r=;
// e22: sn74151 
assign tx_clk = bd96_192 & ~b1 & ~b2 & ~b3
                 | bd4800 & ~b1 & ~b2 & b3
                 | bd2400 & ~b1 & b2 & ~b3
                 | bd1200 & ~b1 & b2 & b3
                 | bd600 & b1 & ~b2 & ~b3
                 | bd300 & b1 & ~b2 & b3
                 | bd150 & b1 & b2 & ~b3
                 | bd110 & b1 & b2 & b3;
assign tx_clk_l = ~tx_clk;
// e23: sn7401 
// data07_l = !(rd4 & io_read_h); 
// data06_l = !(rd5 & io_read_h); 
// data04_l = !(io_read_h & rd7); 
// data05_l = !(io_read_h & rd6); 
// e24: sp380n 
assign n_t_90x = ~(data07_l
                    | trans_246_l);
assign n_t_91x = ~(trans_246_l
                    | data06_l);
assign n_t_92x = ~(data05_l
                    | trans_246_l);
assign n_t_93x = ~(trans_246_l
                    | data04_l);
// e25: sn74175 
always @(count_fillchar, io_tpc_l, n_t_90x)
  if (io_tpc_l) begin
    n_t_99x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_99x_m <= n_t_90x;
  end
always @(count_fillchar, io_tpc_l, n_t_99x_m)
  if (io_tpc_l) begin
    n_t_99x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_99x <= n_t_99x_m;
  end
always @(count_fillchar, io_tpc_l, n_t_91x)
  if (io_tpc_l) begin
    n_t_100x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_100x_m <= n_t_91x;
  end
always @(count_fillchar, io_tpc_l, n_t_100x_m)
  if (io_tpc_l) begin
    n_t_100x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_100x <= n_t_100x_m;
  end
always @(count_fillchar, io_tpc_l, n_t_93x)
  if (io_tpc_l) begin
    n_t_101x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_101x_m <= n_t_93x;
  end
always @(count_fillchar, io_tpc_l, n_t_101x_m)
  if (io_tpc_l) begin
    n_t_101x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_101x <= n_t_101x_m;
  end
always @(count_fillchar, io_tpc_l, n_t_92x)
  if (io_tpc_l) begin
    n_t_102x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_102x_m <= n_t_92x;
  end
always @(count_fillchar, io_tpc_l, n_t_102x_m)
  if (io_tpc_l) begin
    n_t_102x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_102x <= n_t_102x_m;
  end
// e26: sn7430 
assign lf_decoded_l = ~(n_t_98x & ~n_t_97x & ~fill & ~n_t_89x & ~n_t_99x & ~n_t_100x & ~n_t_102x & n_t_96x);
// e27: sn7474 
always @(rx_data_av, n3v3, io_kcf_l, 1'b0)
  if (~n3v3) begin
    rflag_l_m <= 1'b0;
  end else
  if (~io_kcf_l) begin
    rflag_l_m <= 1'b1;
  end else
  if (~(rx_data_av)) begin
    rflag_l_m <= 1'b0;
  end
always @(rx_data_av, n3v3, io_kcf_l, rflag_l_m)
  if (~n3v3) begin
    rflag_l <= 1'b0;
  end else
  if (~io_kcf_l) begin
    rflag_l <= 1'b1;
  end else
  if (rx_data_av) begin
    rflag_l <= rflag_l_m;
  end
always @(n_t_49x, n3v3, test_sync, test_sync)
  if (~n3v3) begin
    sync_l_m <= 1'b0;
  end else
  if (~test_sync) begin
    sync_l_m <= 1'b1;
  end else
  if (~(~n_t_49x)) begin
    sync_l_m <= ~test_sync;
  end
always @(n_t_49x, n3v3, test_sync, sync_l_m)
  if (~n3v3) begin
    sync_l <= 1'b0;
  end else
  if (~test_sync) begin
    sync_l <= 1'b1;
  end else
  if (~n_t_49x) begin
    sync_l <= sync_l_m;
  end
// e29: sn7401 
// data11_l = !(rd0 & io_read_h); 
// data10_l = !(rd1 & io_read_h); 
// data08_l = !(io_read_h & rd3); 
// data09_l = !(io_read_h & rd2); 
// e30: sp380n 
assign n_t_69x = ~(data11_l
                    | trans_246_l);
assign n_t_86x = ~(trans_246_l
                    | data10_l);
assign n_t_87x = ~(data09_l
                    | trans_246_l);
assign n_t_88x = ~(trans_246_l
                    | data08_l);
// e31: sn74175 
always @(count_fillchar, io_tpc_l, n_t_69x)
  if (io_tpc_l) begin
    n_t_89x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_89x_m <= n_t_69x;
  end
always @(count_fillchar, io_tpc_l, n_t_89x_m)
  if (io_tpc_l) begin
    n_t_89x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_89x <= n_t_89x_m;
  end
always @(count_fillchar, io_tpc_l, n_t_86x)
  if (io_tpc_l) begin
    n_t_96x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_96x_m <= n_t_86x;
  end
always @(count_fillchar, io_tpc_l, n_t_96x_m)
  if (io_tpc_l) begin
    n_t_96x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_96x <= n_t_96x_m;
  end
always @(count_fillchar, io_tpc_l, n_t_88x)
  if (io_tpc_l) begin
    n_t_98x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_98x_m <= n_t_88x;
  end
always @(count_fillchar, io_tpc_l, n_t_98x_m)
  if (io_tpc_l) begin
    n_t_98x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_98x <= n_t_98x_m;
  end
always @(count_fillchar, io_tpc_l, n_t_87x)
  if (io_tpc_l) begin
    n_t_97x_m <= 1'b0;
  end else
  if (~(~count_fillchar)) begin
    n_t_97x_m <= n_t_87x;
  end
always @(count_fillchar, io_tpc_l, n_t_97x_m)
  if (io_tpc_l) begin
    n_t_97x <= 1'b0;
  end else
  if (~count_fillchar) begin
    n_t_97x <= n_t_97x_m;
  end
// e32: sn7404 
// e33: sn7401 
// skip_l = !(!rflag_l & !recv_1); 
// int_rqst_l = !(n_t_48x & int_enab_h); 
// skip_l = !(n_t_47x & n_t_48x); 
// skip_l = !(!trans_1 & tflag_h); 
// e34: sn7401 
// c1_l = c0_l; 
// internal_io_l = !(selected_h & !io_pause_l); 
// c0_l = c0_l; 
// c1_l = !(n3v3 & io_read_h); 
// e35: sn7402 
assign n_t_31x = ~(~n_t_21x
                    | trans_246);
assign n_t_32x = ~(trans_246
                    | ~n_t_22x);
assign n_t_39x = ~(recv_5
                    | ~tp3);
// e36: dec8266 
// io_rdrrun_l = !(!n3v3 & initialize
//            # !c0_l & !initialize & tp3); 
// io_kcf_l = !(initialize
//         # n_t_33x & !initialize & tp3); 
// io_tpc_l = !(!n3v3 & initialize
//         # n_t_32x & !initialize & tp3); 
// io_tcf_l = !(initialize
//         # n_t_31x & !initialize & tp3); 
// e37: sn7402 
assign n_t_71x = ~(n_t_73x
                    | ~n_t_78x);
assign n_t_72x = ~(n_t_71x
                    | initialize);
assign n_t_42x = ~(~tp3
                    | trans_0);
assign count_fillchar = ~(n_t_76x
                           | filch_h);
// e38: sn7400 
assign n_t_48x = ~(rflag_l & ~tflag_h);
// e39: sn7474 
always @(n_t_116x, initialize, io_rdrrun_l, 1'b0)
  if (initialize) begin
    n_t_117x_m <= 1'b0;
  end else
  if (~io_rdrrun_l) begin
    n_t_117x_m <= 1'b1;
  end else
  if (~(n_t_116x)) begin
    n_t_117x_m <= 1'b0;
  end
always @(n_t_116x, initialize, io_rdrrun_l, n_t_117x_m)
  if (initialize) begin
    n_t_117x <= 1'b0;
  end else
  if (~io_rdrrun_l) begin
    n_t_117x <= 1'b1;
  end else
  if (n_t_116x) begin
    n_t_117x <= n_t_117x_m;
  end
assign n_t_118x = ~n_t_117x;
// e40: sn7400 
assign n_t_33x = ~(recv_0 & c0_l);
assign n_t_26x = ~(n_t_23x & n_t_21x);
assign n_t_74x = ~(n_t_70x & io_tpc_l);
assign n_t_70x = ~(tx_buf_empty & ~filch_h);
// e41: sn7442 
assign recv_0 = ~(~n_t_28x & ~n_t_19x & ~n_t_25x & ~n_t_23x);
assign recv_1 = ~(~n_t_28x & ~n_t_19x & ~n_t_25x & n_t_23x);
assign recv_246 = ~(~n_t_28x & ~n_t_19x & n_t_25x & ~n_t_23x);
assign recv_5 = ~(~n_t_28x & ~n_t_19x & n_t_25x & n_t_23x);
assign trans_0 = ~(~n_t_28x & n_t_19x & ~n_t_25x & ~n_t_23x);
assign trans_1 = ~(~n_t_28x & n_t_19x & ~n_t_25x & n_t_23x);
assign trans_246 = ~(~n_t_28x & n_t_19x & n_t_25x & ~n_t_23x);
assign trans_5 = ~(~n_t_28x & n_t_19x & n_t_25x & n_t_23x);
// e42: sn7474 
always @(n_t_74x, n3v3, n_t_72x, 1'b0)
  if (~n3v3) begin
    n_t_76x_m <= 1'b0;
  end else
  if (~n_t_72x) begin
    n_t_76x_m <= 1'b1;
  end else
  if (~(n_t_74x)) begin
    n_t_76x_m <= 1'b0;
  end
always @(n_t_74x, n3v3, n_t_72x, n_t_76x_m)
  if (~n3v3) begin
    n_t_76x <= 1'b0;
  end else
  if (~n_t_72x) begin
    n_t_76x <= 1'b1;
  end else
  if (n_t_74x) begin
    n_t_76x <= n_t_76x_m;
  end
always @(n_t_73x, n_t_76x, n3v3, n_t_76x)
  if (n_t_76x) begin
    n_t_78x_m <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_78x_m <= 1'b1;
  end else
  if (~(n_t_73x)) begin
    n_t_78x_m <= ~n_t_76x;
  end
always @(n_t_73x, n_t_76x, n3v3, n_t_78x_m)
  if (n_t_76x) begin
    n_t_78x <= 1'b0;
  end else
  if (~n3v3) begin
    n_t_78x <= 1'b1;
  end else
  if (n_t_73x) begin
    n_t_78x <= n_t_78x_m;
  end
// e43: sn7474 
always @(n_t_80x, n3v3, initialize, n_t_77x)
  if (~n3v3) begin
    n_t_77x_m <= 1'b0;
  end else
  if (initialize) begin
    n_t_77x_m <= 1'b1;
  end else
  if (~(n_t_80x)) begin
    n_t_77x_m <= ~n_t_77x;
  end
always @(n_t_80x, n3v3, initialize, n_t_77x_m)
  if (~n3v3) begin
    n_t_77x <= 1'b0;
  end else
  if (initialize) begin
    n_t_77x <= 1'b1;
  end else
  if (n_t_80x) begin
    n_t_77x <= n_t_77x_m;
  end
always @(count_fillchar, n3v3, initialize, n_t_80x)
  if (~n3v3) begin
    n_t_80x_m <= 1'b0;
  end else
  if (initialize) begin
    n_t_80x_m <= 1'b1;
  end else
  if (~(count_fillchar)) begin
    n_t_80x_m <= ~n_t_80x;
  end
always @(count_fillchar, n3v3, initialize, n_t_80x_m)
  if (~n3v3) begin
    n_t_80x <= 1'b0;
  end else
  if (initialize) begin
    n_t_80x <= 1'b1;
  end else
  if (count_fillchar) begin
    n_t_80x <= n_t_80x_m;
  end
// e44: sn7493 
always @(rx_clk, n_t_113x, n_t_114x)
  if (n_t_113x) begin
    n_t_114x_m <= 1'b0;
  end else
  if (~(~rx_clk)) begin
    n_t_114x_m <= ~n_t_114x;
  end
always @(rx_clk, n_t_113x, n_t_114x_m)
  if (n_t_113x) begin
    n_t_114x <= 1'b0;
  end else
  if (~rx_clk) begin
    n_t_114x <= n_t_114x_m;
  end
always @(n_t_114x, n_t_113x, gdollar_6)
  if (n_t_113x) begin
    gdollar_6_m <= 1'b0;
  end else
  if (~(~n_t_114x)) begin
    gdollar_6_m <= ~gdollar_6;
  end
always @(n_t_114x, n_t_113x, gdollar_6_m)
  if (n_t_113x) begin
    gdollar_6 <= 1'b0;
  end else
  if (~n_t_114x) begin
    gdollar_6 <= gdollar_6_m;
  end
always @(gdollar_6, n_t_113x, gdollar_7)
  if (n_t_113x) begin
    gdollar_7_m <= 1'b0;
  end else
  if (~(~gdollar_6)) begin
    gdollar_7_m <= ~gdollar_7;
  end
always @(gdollar_6, n_t_113x, gdollar_7_m)
  if (n_t_113x) begin
    gdollar_7 <= 1'b0;
  end else
  if (~gdollar_6) begin
    gdollar_7 <= gdollar_7_m;
  end
always @(gdollar_7, n_t_113x, n_t_116x)
  if (n_t_113x) begin
    n_t_116x_m <= 1'b0;
  end else
  if (~(~gdollar_7)) begin
    n_t_116x_m <= ~n_t_116x;
  end
always @(gdollar_7, n_t_113x, n_t_116x_m)
  if (n_t_113x) begin
    n_t_116x <= 1'b0;
  end else
  if (~gdollar_7) begin
    n_t_116x <= n_t_116x_m;
  end
// e46: sp384n 
assign n_t_25x = n_t_21x
                  | n_t_22x;
// e47: sn7410 
assign n_t_83x = ~(n_t_77x & ~tx_buf_empty & n_t_80x);
assign n_t_28x = ~(n_t_26x & ~io_pause_l & selected_h);
// e48: sn7440 
assign n_t_84x = ~(n_t_77x & ~txd_strobe & n_t_80x & ~filch_h);
// e49: sn7404 
assign n_t_126x = ~n_t_133x;
// e51: sp380n 
assign rx20ma_data_l = ~(rx20ma_data
                          | n_t_146x);
assign rx20ma_data = ~(rx20ma_data_l
                        | n_t_145x);
assign n_t_146x = ~(n_t_145x
                     | n_t_144x);
assign n_t_145x = ~(n_t_146x
                     | n_t_139x);
// e52: sp380n 
assign n_t_23x = ~(md11
                    | ~selected_h);
assign n_t_21x = ~(~selected_h
                    | md10);
assign n_t_22x = ~(md09
                    | ~selected_h);
// e53: n8815 
assign n_t_47x = ~(~int_enab_h
                    | trans_5
                    | trans_5);
assign n_t_110x = ~(swd
                     | stat_enab_l
                     | ~io_read_h
                     | io_pause_l);
// e54: sn7400 
assign n_t_113x = ~(rx20ma_data_l & n_t_117x);
assign n_t_85x = ~(n_t_84x & n_t_83x);
assign txd_strobe = ~(n_t_78x & n_t_53x);
// e55: sp380n 
assign n_t_41x = ~(data10_l
                    | recv_5);
assign n_t_40x = ~(recv_5
                    | data11_l);
assign xr = ~power_ok;
assign n_t_133x = ~serial_out;
// e56: sn7474 
always @(n_t_39x, n3v3, initialize, n_t_40x)
  if (~n3v3) begin
    int_enab_h_m <= 1'b0;
  end else
  if (initialize) begin
    int_enab_h_m <= 1'b1;
  end else
  if (~(n_t_39x)) begin
    int_enab_h_m <= n_t_40x;
  end
always @(n_t_39x, n3v3, initialize, int_enab_h_m)
  if (~n3v3) begin
    int_enab_h <= 1'b0;
  end else
  if (initialize) begin
    int_enab_h <= 1'b1;
  end else
  if (n_t_39x) begin
    int_enab_h <= int_enab_h_m;
  end
always @(n_t_39x, n3v3, initialize, n_t_41x)
  if (~n3v3) begin
    stat_enab_l_m <= 1'b0;
  end else
  if (initialize) begin
    stat_enab_l_m <= 1'b1;
  end else
  if (~(n_t_39x)) begin
    stat_enab_l_m <= ~n_t_41x;
  end
always @(n_t_39x, n3v3, initialize, stat_enab_l_m)
  if (~n3v3) begin
    stat_enab_l <= 1'b0;
  end else
  if (initialize) begin
    stat_enab_l <= 1'b1;
  end else
  if (n_t_39x) begin
    stat_enab_l <= stat_enab_l_m;
  end
// e57: sn7474 
always @(tx_buf_empty, io_tcf_l, n_t_42x, filch_h)
  if (~io_tcf_l) begin
    tflag_h_m <= 1'b0;
  end else
  if (n_t_42x) begin
    tflag_h_m <= 1'b1;
  end else
  if (~(tx_buf_empty)) begin
    tflag_h_m <= filch_h;
  end
always @(tx_buf_empty, io_tcf_l, n_t_42x, tflag_h_m)
  if (~io_tcf_l) begin
    tflag_h <= 1'b0;
  end else
  if (n_t_42x) begin
    tflag_h <= 1'b1;
  end else
  if (tx_buf_empty) begin
    tflag_h <= tflag_h_m;
  end
always @(n_t_85x, n3v3, initialize, lf_decoded_l)
  if (~n3v3) begin
    filch_h_m <= 1'b0;
  end else
  if (initialize) begin
    filch_h_m <= 1'b1;
  end else
  if (~(n_t_85x)) begin
    filch_h_m <= lf_decoded_l;
  end
always @(n_t_85x, n3v3, initialize, filch_h_m)
  if (~n3v3) begin
    filch_h <= 1'b0;
  end else
  if (initialize) begin
    filch_h <= 1'b1;
  end else
  if (n_t_85x) begin
    filch_h <= filch_h_m;
  end
// open collector 'wire-or's 
assign c0_l = ~(~(~(~n_t_21x
                   | recv_246)))? ~(~(~n_t_21x
                   | recv_246)): 1'bz;
assign c1_l = (~c0_l)
               | (n3v3 & io_read_h)? 1'b0: 1'bz;
assign data00_l = (has_error & n_t_110x)? 1'b0: 1'bz;
assign data01_l = (parity_err & n_t_110x)? 1'b0: 1'bz;
assign data02_l = (framing_err & n_t_110x)? 1'b0: 1'bz;
assign data03_l = (overrun_err & n_t_110x)? 1'b0: 1'bz;
assign data04_l = (io_read_h & rd7)? 1'b0: 1'bz;
assign data05_l = (io_read_h & rd6)? 1'b0: 1'bz;
assign data06_l = (rd5 & io_read_h)? 1'b0: 1'bz;
assign data07_l = (rd4 & io_read_h)? 1'b0: 1'bz;
assign data08_l = (io_read_h & rd3)? 1'b0: 1'bz;
assign data09_l = (io_read_h & rd2)? 1'b0: 1'bz;
assign data10_l = (rd1 & io_read_h)? 1'b0: 1'bz;
assign data11_l = (rd0 & io_read_h)? 1'b0: 1'bz;
assign int_rqst_l = (n_t_48x & int_enab_h)? 1'b0: 1'bz;
assign internal_io_l = (selected_h & ~io_pause_l)? 1'b0: 1'bz;
assign io_kcf_l = ~((initialize
                      | n_t_33x & ~initialize & tp3));
assign io_rdrrun_l = ~((~n3v3 & initialize
                         | ~c0_l & ~initialize & tp3));
assign io_tcf_l = ~((initialize
                      | n_t_31x & ~initialize & tp3));
assign io_tpc_l = ~((~n3v3 & initialize
                      | n_t_32x & ~initialize & tp3));
assign n_t_19x = (~n_t_18x & ~n_t_6x
                   | n_t_18x & n_t_6x)
                  | (~n_t_7x & ~n_t_1x
                     | n_t_7x & n_t_1x)
                  | (~n_t_17x & ~n_t_5x
                     | n_t_17x & n_t_5x)
                  | (~n_t_14x & ~n_t_2x
                     | n_t_14x & n_t_2x)
                  | (~n_t_3x & ~n_t_15x
                     | n_t_3x & n_t_15x)
                  | (~n_t_4x & ~n_t_16x
                     | n_t_4x & n_t_16x)? 1'b0: 1'bz;
assign n_t_20x = (~n_t_17x & ~n_t_12x
                   | n_t_17x & n_t_12x)
                  | (~n_t_14x & ~n_t_9x
                     | n_t_14x & n_t_9x)
                  | (~n_t_10x & ~n_t_15x
                     | n_t_10x & n_t_15x)
                  | (~n_t_11x & ~n_t_16x
                     | n_t_11x & n_t_16x)
                  | (~n_t_8x & ~n_t_7x
                     | n_t_8x & n_t_7x)
                  | (~n_t_13x & ~n_t_18x
                     | n_t_13x & n_t_18x)? 1'b0: 1'bz;
assign skip_l = (~rflag_l & ~recv_1)
                 | (n_t_47x & n_t_48x)
                 | (~trans_1 & tflag_h)? 1'b0: 1'bz;
endmodule