// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
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// e1: sn7474 
module m865b (n3v, n_t_119x, n_t_121x, n_t_124x, n_t_51x, n_t_76x, n_t_78x, c0_l, c1_l, data10_l, data11_l, data4_l, data5_l, data6_l, data7_l, data8_l, data9_l, init, int_ena, int_rqst_l, internal_io_l, io_pause_l, md10_l, md11_l, md3_l, md4_l, md5_l, md6_l, md7_l, md8_l, md9_l, n15v, n604_l, n_t_105x, n_t_107x, n_t_111x, n_t_114x, n_t_117x, n_t_123x, n_t_31x, n_t_52x, n_t_77x, n_t_82x, power_ok, rx_active, skip_l, stop1_l, stop2_l, sw, tp3, tpcnow_l, xmit_active);
input n3v;
input n_t_119x;
input n_t_121x;
input n_t_124x;
input n_t_51x;
input n_t_76x;
input n_t_78x;
output c0_l;
output c1_l;
inout data10_l;
inout data11_l;
inout data4_l;
inout data5_l;
inout data6_l;
inout data7_l;
inout data8_l;
inout data9_l;
input init;
inout int_ena;
output int_rqst_l;
output internal_io_l;
input io_pause_l;
input md10_l;
input md11_l;
input md3_l;
input md4_l;
input md5_l;
input md6_l;
input md7_l;
input md8_l;
input md9_l;
output n15v;
inout n604_l;
inout n_t_105x;
input n_t_107x;
inout n_t_111x;
output n_t_114x;
inout reg n_t_117x;
output n_t_123x;
output reg n_t_31x;
input n_t_52x;
output n_t_77x;
input n_t_82x;
input power_ok;
inout reg rx_active;
output skip_l;
output stop1_l;
output reg stop2_l;
input sw;
input tp3;
inout tpcnow_l;
inout reg xmit_active;

reg enable_m;
reg gdollar_0_m;
reg gdollar_1_m;
reg gdollar_2_m;
reg gdollar_3_m;
reg gdollar_4_m;
reg gdollar_5_m;
reg gdollar_6_m;
reg gdollar_7_m;
reg int_ena_l_m;
reg last_unit_m;
reg n_t_100x_m;
reg n_t_101x_m;
reg n_t_117x_m;
reg n_t_131x_m;
reg n_t_134x_m;
reg n_t_13x_m;
reg n_t_14x_m;
reg n_t_15x_m;
reg n_t_16x_m;
reg n_t_17x_m;
reg n_t_18x_m;
reg n_t_28x_m;
reg n_t_31x_m;
reg n_t_57x_m;
reg n_t_64x_m;
reg n_t_6x_m;
reg n_t_72x_m;
reg n_t_73x_m;
reg n_t_74x_m;
reg n_t_79x_m;
reg n_t_80x_m;
reg n_t_84x_m;
reg n_t_85x_m;
reg n_t_86x_m;
reg n_t_89x_m;
reg n_t_92x_m;
reg n_t_93x_m;
reg n_t_95x_m;
reg n_t_97x_m;
reg n_t_98x_m;
reg n_t_99x_m;
reg rcvr_clk_m;
reg rx_active_m;
reg rx_flag_l_m;
reg stop2_l_m;
reg tx_flag_l_m;
reg xmit_active_m;
reg xmit_clk_m;

reg n_t_131x;
reg n_t_72x;
reg gdollar_0;
reg gdollar_1;
reg n_t_80x;
reg gdollar_2;
reg gdollar_3;
reg gdollar_4;
reg n_t_57x;
reg n_t_134x;
reg n_t_92x;
reg n_t_84x;
reg gdollar_5;
reg gdollar_6;
reg n_t_85x;
reg n_t_54x;
reg n_t_89x;
reg last_unit;
reg n_t_86x;
reg rcvr_clk;
reg gdollar_7;
reg xmit_clk;
reg n_t_73x;
reg n_t_74x;
reg n_t_64x;
reg int_ena_l;
reg tx_flag_l;
reg n_t_98x;
reg n_t_95x;
reg n_t_97x;
reg n_t_79x;
reg enable;
reg rx_flag_l;
reg n_t_14x;
reg n_t_15x;
reg n_t_13x;
reg n_t_16x;
reg n_t_18x;
reg n_t_6x;
reg n_t_17x;
reg n_t_28x;
reg n_t_93x;
reg n_t_99x;
reg n_t_101x;
reg n_t_100x;
wire clear_rx_flag;
wire clr_active_l;
wire dokcc;
wire dotcf;
wire dotpc;
wire dtx_active_l;
wire freq_div;
wire io_pause;
wire kcc_l;
wire kcf_l;
wire kie_l;
wire krb_l;
wire krs_l;
wire ksf_l;
wire n603x;
wire n604x;
wire n_t_10x;
wire n_t_110x;
wire n_t_11x;
wire n_t_120x;
wire n_t_126x;
wire n_t_128x;
wire n_t_12x;
wire n_t_133x;
wire n_t_136x;
wire n_t_137x;
wire n_t_1x;
wire n_t_2x;
wire n_t_33x;
wire n_t_34x;
wire n_t_35x;
wire n_t_36x;
wire n_t_37x;
wire n_t_38x;
wire n_t_39x;
wire n_t_3x;
wire n_t_40x;
wire n_t_41x;
wire n_t_42x;
wire n_t_43x;
wire n_t_44x;
wire n_t_45x;
wire n_t_46x;
wire n_t_47x;
wire n_t_4x;
wire n_t_58x;
wire n_t_5x;
wire n_t_68x;
wire n_t_69x;
wire n_t_70x;
wire n_t_71x;
wire n_t_7x;
wire n_t_81x;
wire n_t_83x;
wire n_t_88x;
wire n_t_9x;
wire preset_l;
wire read_buffer;
wire rr_clk;
wire rx_clk;
wire rx_clk_l;
wire rx_clr_l;
wire rx_data;
wire set_last;
wire set_rr_l;
wire tcf_l;
wire tfl_l;
wire tflnow_l;
wire tls_l;
wire tpc_l;
wire tsf_l;
wire tsk_l;
wire tx_busy_l;
always @(n_t_137x, clr_active_l, n_t_110x, 1'b0)
  if (~clr_active_l) begin
    rx_active_m <= 1'b0;
  end else
  if (~n_t_110x) begin
    rx_active_m <= 1'b1;
  end else
  if (~(~n_t_137x)) begin
    rx_active_m <= 1'b0;
  end
always @(n_t_137x, clr_active_l, n_t_110x, rx_active_m)
  if (~clr_active_l) begin
    rx_active <= 1'b0;
  end else
  if (~n_t_110x) begin
    rx_active <= 1'b1;
  end else
  if (~n_t_137x) begin
    rx_active <= rx_active_m;
  end
always @(rx_clk_l, rx_active, rx_clr_l, 1'b0)
  if (~rx_active) begin
    n_t_131x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_131x_m <= 1'b1;
  end else
  if (~(rx_clk_l)) begin
    n_t_131x_m <= 1'b0;
  end
always @(rx_clk_l, rx_active, rx_clr_l, n_t_131x_m)
  if (~rx_active) begin
    n_t_131x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_131x <= 1'b1;
  end else
  if (rx_clk_l) begin
    n_t_131x <= n_t_131x_m;
  end
// e2: sn7410 
assign n_t_110x = ~(rcvr_clk & ~preset_l & n_t_111x);
assign preset_l = ~(~last_unit & ~rx_active & ~rx_active);
assign n_t_136x = ~(n_t_131x & rx_clk & rx_data);
// e3: sn7400 
assign n_t_88x = ~(preset_l & n_t_89x);
assign rx_clk_l = ~(rx_active & n_t_134x);
assign rx_data = ~n_t_111x;
assign n_t_137x = ~(rx_clk_l & last_unit);
// e4: sn7493 
always @(n_t_57x, init, n3v, n_t_72x)
  if (init & n3v) begin
    n_t_72x_m <= 1'b0;
  end else
  if (~(~n_t_57x)) begin
    n_t_72x_m <= ~n_t_72x;
  end
always @(n_t_57x, init, n3v, n_t_72x_m)
  if (init & n3v) begin
    n_t_72x <= 1'b0;
  end else
  if (~n_t_57x) begin
    n_t_72x <= n_t_72x_m;
  end
always @(n_t_72x, init, n3v, gdollar_0)
  if (init & n3v) begin
    gdollar_0_m <= 1'b0;
  end else
  if (~(~n_t_72x)) begin
    gdollar_0_m <= ~gdollar_0;
  end
always @(n_t_72x, init, n3v, gdollar_0_m)
  if (init & n3v) begin
    gdollar_0 <= 1'b0;
  end else
  if (~n_t_72x) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(gdollar_0, init, n3v, gdollar_1)
  if (init & n3v) begin
    gdollar_1_m <= 1'b0;
  end else
  if (~(~gdollar_0)) begin
    gdollar_1_m <= ~gdollar_1;
  end
always @(gdollar_0, init, n3v, gdollar_1_m)
  if (init & n3v) begin
    gdollar_1 <= 1'b0;
  end else
  if (~gdollar_0) begin
    gdollar_1 <= gdollar_1_m;
  end
always @(gdollar_1, init, n3v, n_t_80x)
  if (init & n3v) begin
    n_t_80x_m <= 1'b0;
  end else
  if (~(~gdollar_1)) begin
    n_t_80x_m <= ~n_t_80x;
  end
always @(gdollar_1, init, n3v, n_t_80x_m)
  if (init & n3v) begin
    n_t_80x <= 1'b0;
  end else
  if (~gdollar_1) begin
    n_t_80x <= n_t_80x_m;
  end
// e5: sn7493 
always @(, init, n3v, gdollar_2)
  if (init & n3v) begin
    gdollar_2_m <= 1'b0;
  end else
  if (~(~)) begin
    gdollar_2_m <= ~gdollar_2;
  end
always @(, init, n3v, gdollar_2_m)
  if (init & n3v) begin
    gdollar_2 <= 1'b0;
  end else
  if (~) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(n_t_54x, init, n3v, gdollar_3)
  if (init & n3v) begin
    gdollar_3_m <= 1'b0;
  end else
  if (~(~n_t_54x)) begin
    gdollar_3_m <= ~gdollar_3;
  end
always @(n_t_54x, init, n3v, gdollar_3_m)
  if (init & n3v) begin
    gdollar_3 <= 1'b0;
  end else
  if (~n_t_54x) begin
    gdollar_3 <= gdollar_3_m;
  end
always @(gdollar_3, init, n3v, gdollar_4)
  if (init & n3v) begin
    gdollar_4_m <= 1'b0;
  end else
  if (~(~gdollar_3)) begin
    gdollar_4_m <= ~gdollar_4;
  end
always @(gdollar_3, init, n3v, gdollar_4_m)
  if (init & n3v) begin
    gdollar_4 <= 1'b0;
  end else
  if (~gdollar_3) begin
    gdollar_4 <= gdollar_4_m;
  end
always @(gdollar_4, init, n3v, n_t_57x)
  if (init & n3v) begin
    n_t_57x_m <= 1'b0;
  end else
  if (~(~gdollar_4)) begin
    n_t_57x_m <= ~n_t_57x;
  end
always @(gdollar_4, init, n3v, n_t_57x_m)
  if (init & n3v) begin
    n_t_57x <= 1'b0;
  end else
  if (~gdollar_4) begin
    n_t_57x <= n_t_57x_m;
  end
// e6: sn7404 
assign rx_clk = ~(~n_t_124x);
assign n_t_123x = ~rx_clk_l;
assign n_t_77x = xmit_active;
assign dtx_active_l = ~n_t_78x;
// e7: sn7474 
always @(n_t_92x, preset_l, n3v, n_t_134x)
  if (~preset_l) begin
    n_t_134x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_134x_m <= 1'b1;
  end else
  if (~(n_t_92x)) begin
    n_t_134x_m <= ~n_t_134x;
  end
always @(n_t_92x, preset_l, n3v, n_t_134x_m)
  if (~preset_l) begin
    n_t_134x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_134x <= 1'b1;
  end else
  if (n_t_92x) begin
    n_t_134x <= n_t_134x_m;
  end
always @(n_t_89x, n3v, preset_l, n_t_92x)
  if (~n3v) begin
    n_t_92x_m <= 1'b0;
  end else
  if (~preset_l) begin
    n_t_92x_m <= 1'b1;
  end else
  if (~(~n_t_89x)) begin
    n_t_92x_m <= ~n_t_92x;
  end
always @(n_t_89x, n3v, preset_l, n_t_92x_m)
  if (~n3v) begin
    n_t_92x <= 1'b0;
  end else
  if (~preset_l) begin
    n_t_92x <= 1'b1;
  end else
  if (~n_t_89x) begin
    n_t_92x <= n_t_92x_m;
  end
// e8: sn7493 
always @(n_t_80x, init, n3v, n_t_84x)
  if (init & n3v) begin
    n_t_84x_m <= 1'b0;
  end else
  if (~(~n_t_80x)) begin
    n_t_84x_m <= ~n_t_84x;
  end
always @(n_t_80x, init, n3v, n_t_84x_m)
  if (init & n3v) begin
    n_t_84x <= 1'b0;
  end else
  if (~n_t_80x) begin
    n_t_84x <= n_t_84x_m;
  end
always @(n_t_84x, init, n3v, gdollar_5)
  if (init & n3v) begin
    gdollar_5_m <= 1'b0;
  end else
  if (~(~n_t_84x)) begin
    gdollar_5_m <= ~gdollar_5;
  end
always @(n_t_84x, init, n3v, gdollar_5_m)
  if (init & n3v) begin
    gdollar_5 <= 1'b0;
  end else
  if (~n_t_84x) begin
    gdollar_5 <= gdollar_5_m;
  end
always @(gdollar_5, init, n3v, gdollar_6)
  if (init & n3v) begin
    gdollar_6_m <= 1'b0;
  end else
  if (~(~gdollar_5)) begin
    gdollar_6_m <= ~gdollar_6;
  end
always @(gdollar_5, init, n3v, gdollar_6_m)
  if (init & n3v) begin
    gdollar_6 <= 1'b0;
  end else
  if (~gdollar_5) begin
    gdollar_6 <= gdollar_6_m;
  end
always @(gdollar_6, init, n3v, n_t_85x)
  if (init & n3v) begin
    n_t_85x_m <= 1'b0;
  end else
  if (~(~gdollar_6)) begin
    n_t_85x_m <= ~n_t_85x;
  end
always @(gdollar_6, init, n3v, n_t_85x_m)
  if (init & n3v) begin
    n_t_85x <= 1'b0;
  end else
  if (~gdollar_6) begin
    n_t_85x <= n_t_85x_m;
  end
// e9: sn74h72 
always @(posedge n_t_83x)
  if (n_t_83x) begin
    n_t_54x <= n3v & ~n_t_54x? n_t_54x & n3v & n3v? ~n_t_54x: 1'b1: n_t_54x & n3v & n3v? 1'b0: n_t_54x;
  end
// e10: sp380n 
assign n_t_38x = ~(io_pause
                    | md3_l);
assign rx_clr_l = n_t_121x;
assign n_t_120x = ~(n_t_119x
                     | ~rx_clr_l);
// e11: sn7440 
// e12: sn7474 
always @(rcvr_clk, n3v, n3v, n_t_88x)
  if (~n3v) begin
    n_t_89x_m <= 1'b0;
  end else
  if (~n3v) begin
    n_t_89x_m <= 1'b1;
  end else
  if (~(rcvr_clk)) begin
    n_t_89x_m <= n_t_88x;
  end
always @(rcvr_clk, n3v, n3v, n_t_89x_m)
  if (~n3v) begin
    n_t_89x <= 1'b0;
  end else
  if (~n3v) begin
    n_t_89x <= 1'b1;
  end else
  if (rcvr_clk) begin
    n_t_89x <= n_t_89x_m;
  end
always @(rx_clk, n_t_133x, n3v, set_last)
  if (~n_t_133x) begin
    last_unit_m <= 1'b0;
  end else
  if (~n3v) begin
    last_unit_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    last_unit_m <= set_last;
  end
always @(rx_clk, n_t_133x, n3v, last_unit_m)
  if (~n_t_133x) begin
    last_unit <= 1'b0;
  end else
  if (~n3v) begin
    last_unit <= 1'b1;
  end else
  if (rx_clk) begin
    last_unit <= last_unit_m;
  end
// e13: sn7493 
always @(n_t_85x, init, n3v, n_t_86x)
  if (init & n3v) begin
    n_t_86x_m <= 1'b0;
  end else
  if (~(~n_t_85x)) begin
    n_t_86x_m <= ~n_t_86x;
  end
always @(n_t_85x, init, n3v, n_t_86x_m)
  if (init & n3v) begin
    n_t_86x <= 1'b0;
  end else
  if (~n_t_85x) begin
    n_t_86x <= n_t_86x_m;
  end
always @(n_t_86x, init, n3v, rcvr_clk)
  if (init & n3v) begin
    rcvr_clk_m <= 1'b0;
  end else
  if (~(~n_t_86x)) begin
    rcvr_clk_m <= ~rcvr_clk;
  end
always @(n_t_86x, init, n3v, rcvr_clk_m)
  if (init & n3v) begin
    rcvr_clk <= 1'b0;
  end else
  if (~n_t_86x) begin
    rcvr_clk <= rcvr_clk_m;
  end
always @(rcvr_clk, init, n3v, gdollar_7)
  if (init & n3v) begin
    gdollar_7_m <= 1'b0;
  end else
  if (~(~rcvr_clk)) begin
    gdollar_7_m <= ~gdollar_7;
  end
always @(rcvr_clk, init, n3v, gdollar_7_m)
  if (init & n3v) begin
    gdollar_7 <= 1'b0;
  end else
  if (~rcvr_clk) begin
    gdollar_7 <= gdollar_7_m;
  end
always @(gdollar_7, init, n3v, xmit_clk)
  if (init & n3v) begin
    xmit_clk_m <= 1'b0;
  end else
  if (~(~gdollar_7)) begin
    xmit_clk_m <= ~xmit_clk;
  end
always @(gdollar_7, init, n3v, xmit_clk_m)
  if (init & n3v) begin
    xmit_clk <= 1'b0;
  end else
  if (~gdollar_7) begin
    xmit_clk <= xmit_clk_m;
  end
// e14: sn74h00 
assign n_t_81x = ~(n_t_51x & n_t_52x);
assign n_t_83x = ~(n_t_82x & n_t_81x);
// e15: sn7474 
always @(xmit_clk, n3v, freq_div, xmit_active)
  if (~n3v) begin
    n_t_73x_m <= 1'b0;
  end else
  if (freq_div) begin
    n_t_73x_m <= 1'b1;
  end else
  if (~(xmit_clk)) begin
    n_t_73x_m <= xmit_active;
  end
always @(xmit_clk, n3v, freq_div, n_t_73x_m)
  if (~n3v) begin
    n_t_73x <= 1'b0;
  end else
  if (freq_div) begin
    n_t_73x <= 1'b1;
  end else
  if (xmit_clk) begin
    n_t_73x <= n_t_73x_m;
  end
assign stop1_l = ~n_t_73x;
always @(xmit_clk, init, n3v, n_t_71x)
  if (init) begin
    xmit_active_m <= 1'b0;
  end else
  if (~n3v) begin
    xmit_active_m <= 1'b1;
  end else
  if (~(xmit_clk)) begin
    xmit_active_m <= n_t_71x;
  end
always @(xmit_clk, init, n3v, xmit_active_m)
  if (init) begin
    xmit_active <= 1'b0;
  end else
  if (~n3v) begin
    xmit_active <= 1'b1;
  end else
  if (xmit_clk) begin
    xmit_active <= xmit_active_m;
  end
// e16: sn7400 
assign n_t_70x = ~(tx_busy_l & freq_div);
assign n_t_69x = ~(enable & n_t_76x);
assign n_t_71x = ~(n_t_69x & n_t_68x);
assign n_t_68x = ~(n_t_70x & xmit_active);
// e17: sn7400 
assign n_t_44x = ~(rx_flag_l & tx_flag_l);
assign n_t_58x = ~(n_t_64x & xmit_active);
assign n_t_133x = ~(n_t_134x & ~rx_active);
// e18: sn7460 
// n_t_105x = !n_t_107x; 
// !n_t_105x = !n_t_105x; 
// n_t_105x = n_t_105x; 
// n_t_111x = !n_t_105x; 
// e19: sn7474 
always @(xmit_clk, freq_div, n3v, n_t_74x)
  if (freq_div) begin
    stop2_l_m <= 1'b0;
  end else
  if (~n3v) begin
    stop2_l_m <= 1'b1;
  end else
  if (~(xmit_clk)) begin
    stop2_l_m <= ~n_t_74x;
  end
always @(xmit_clk, freq_div, n3v, stop2_l_m)
  if (freq_div) begin
    stop2_l <= 1'b0;
  end else
  if (~n3v) begin
    stop2_l <= 1'b1;
  end else
  if (xmit_clk) begin
    stop2_l <= stop2_l_m;
  end
always @(xmit_clk, n3v, freq_div, n_t_73x)
  if (~n3v) begin
    n_t_74x_m <= 1'b0;
  end else
  if (freq_div) begin
    n_t_74x_m <= 1'b1;
  end else
  if (~(xmit_clk)) begin
    n_t_74x_m <= n_t_73x;
  end
always @(xmit_clk, n3v, freq_div, n_t_74x_m)
  if (~n3v) begin
    n_t_74x <= 1'b0;
  end else
  if (freq_div) begin
    n_t_74x <= 1'b1;
  end else
  if (xmit_clk) begin
    n_t_74x <= n_t_74x_m;
  end
// e20: sn7474 
always @(xmit_clk, n3v, init, n_t_58x)
  if (~n3v) begin
    n_t_64x_m <= 1'b0;
  end else
  if (init) begin
    n_t_64x_m <= 1'b1;
  end else
  if (~(xmit_clk)) begin
    n_t_64x_m <= n_t_58x;
  end
always @(xmit_clk, n3v, init, n_t_64x_m)
  if (~n3v) begin
    n_t_64x <= 1'b0;
  end else
  if (init) begin
    n_t_64x <= 1'b1;
  end else
  if (xmit_clk) begin
    n_t_64x <= n_t_64x_m;
  end
assign freq_div = ~n_t_64x;
// e21: sn7474 
always @(n_t_47x, init, n3v, n_t_45x)
  if (init) begin
    int_ena_l_m <= 1'b0;
  end else
  if (~n3v) begin
    int_ena_l_m <= 1'b1;
  end else
  if (~(n_t_47x)) begin
    int_ena_l_m <= n_t_45x;
  end
always @(n_t_47x, init, n3v, int_ena_l_m)
  if (init) begin
    int_ena_l <= 1'b0;
  end else
  if (~n3v) begin
    int_ena_l <= 1'b1;
  end else
  if (n_t_47x) begin
    int_ena_l <= int_ena_l_m;
  end
assign int_ena = ~int_ena_l;
always @(freq_div, tflnow_l, n_t_7x, tx_busy_l)
  if (~tflnow_l) begin
    tx_flag_l_m <= 1'b0;
  end else
  if (n_t_7x) begin
    tx_flag_l_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    tx_flag_l_m <= ~tx_busy_l;
  end
always @(freq_div, tflnow_l, n_t_7x, tx_flag_l_m)
  if (~tflnow_l) begin
    tx_flag_l <= 1'b0;
  end else
  if (n_t_7x) begin
    tx_flag_l <= 1'b1;
  end else
  if (~freq_div) begin
    tx_flag_l <= tx_flag_l_m;
  end
// e22: sn7404 
// e23: sp380n 
assign n_t_35x = ~(md6_l
                    | io_pause);
assign n_t_34x = ~(io_pause
                    | md7_l);
assign n_t_36x = ~(md5_l
                    | io_pause);
assign n_t_37x = ~(io_pause
                    | md4_l);
// e24: sp314n 
assign n604x = ~(n_t_38x
                  | md6_l
                  | n_t_34x
                  | n_t_36x
                  | n_t_37x
                  | n_t_33x
                  | io_pause);
// e25: sn7402 
assign n_t_43x = ~(tsf_l
                    | tx_flag_l);
assign n_t_46x = ~(int_ena_l
                    | tsk_l);
assign clr_active_l = ~(~power_ok
                         | ~n_t_136x);
assign clear_rx_flag = ~(n_t_1x
                          | n_t_126x);
// e26: sn7402 
assign n_t_126x = ~(kcf_l
                     | ~tp3);
assign n_t_39x = ~(rx_flag_l
                    | ksf_l);
assign tflnow_l = ~(~(tfl_l
                       | ~tp3));
assign n_t_47x = ~(~tp3
                    | kie_l);
// e27: sp384n 
assign io_pause = sw
                   | io_pause_l;
assign n_t_45x = io_pause
                  | data11_l;
// e28: sp314n 
assign n603x = ~(md8_l
                  | io_pause
                  | n_t_37x
                  | md7_l
                  | n_t_35x
                  | n_t_36x
                  | n_t_38x);
// e29: sn7400 
assign dotcf = ~(tls_l & tcf_l);
assign dotpc = ~(tpc_l & tls_l);
assign n_t_7x = ~(~init & n_t_128x);
assign n_t_128x = ~(tp3 & dotcf);
// e30: sn7400 
assign dokcc = ~(krb_l & kcc_l);
assign read_buffer = ~(krs_l & krb_l);
assign n_t_1x = ~(~init & set_rr_l);
assign set_rr_l = ~(tp3 & dokcc);
// e31: sn7401 
// c1_l = !dokcc; 
// c1_l = !read_buffer; 
// c0_l = !dokcc; 
// e32: sn7401 
// internal_io_l = !n603x; 
// internal_io_l = !n604x; 
// n604_l = !n604x; 
// tpcnow_l = !(tp3 & dotpc); 
// e33: sn7401 
// skip_l = !(n_t_46x & n_t_44x); 
// int_rqst_l = !(n_t_44x & int_ena); 
// skip_l = !n_t_39x; 
// skip_l = !n_t_43x; 
// e34: dec8251 
assign kcf_l = ~(n603x & ~n_t_42x & ~n_t_41x & ~n_t_40x);
assign ksf_l = ~(n603x & ~n_t_42x & ~n_t_41x & n_t_40x);
assign kcc_l = ~(n603x & ~n_t_42x & n_t_41x & ~n_t_40x);
assign krs_l = ~(n603x & n_t_42x & ~n_t_41x & ~n_t_40x);
assign kie_l = ~(n603x & n_t_42x & ~n_t_41x & n_t_40x);
assign krb_l = ~(n603x & n_t_42x & n_t_41x & ~n_t_40x);
// e35: sp380n 
assign n_t_42x = ~(md9_l
                    | io_pause);
assign n_t_33x = ~(io_pause
                    | md8_l);
assign n_t_40x = ~(md11_l
                    | io_pause);
assign n_t_41x = ~(io_pause
                    | md10_l);
// e36: sn7430 
assign tx_busy_l = ~(~(~n_t_13x & ~n_t_17x & ~n_t_15x & ~n_t_14x & ~n_t_6x & ~n_t_18x & ~enable & ~n_t_16x));
// e37: sn7440 
// e38: dec8251 
assign tfl_l = ~(~n604_l & ~n_t_42x & ~n_t_41x & ~n_t_40x);
assign tsf_l = ~(~n604_l & ~n_t_42x & ~n_t_41x & n_t_40x);
assign tcf_l = ~(~n604_l & ~n_t_42x & n_t_41x & ~n_t_40x);
assign tpc_l = ~(~n604_l & n_t_42x & ~n_t_41x & ~n_t_40x);
assign tsk_l = ~(~n604_l & n_t_42x & ~n_t_41x & n_t_40x);
assign tls_l = ~(~n604_l & n_t_42x & n_t_41x & ~n_t_40x);
// e39: sn7401 
// data7_l = !(n_t_98x & read_buffer); 
// data6_l = !(n_t_97x & read_buffer); 
// data5_l = !(read_buffer & n_t_79x); 
// data4_l = !(read_buffer & n_t_95x); 
// e40: sn7474 
always @(rx_clk, n3v, rx_clr_l, n_t_97x)
  if (~n3v) begin
    n_t_98x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_98x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_98x_m <= n_t_97x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_98x_m)
  if (~n3v) begin
    n_t_98x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_98x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_98x <= n_t_98x_m;
  end
always @(rx_clk, n3v, rx_clr_l, rx_data)
  if (~n3v) begin
    n_t_95x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_95x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_95x_m <= rx_data;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_95x_m)
  if (~n3v) begin
    n_t_95x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_95x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_95x <= n_t_95x_m;
  end
assign rr_clk = ~n_t_95x;
// e41: sn7474 
always @(rx_clk, n3v, rx_clr_l, n_t_79x)
  if (~n3v) begin
    n_t_97x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_97x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_97x_m <= n_t_79x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_97x_m)
  if (~n3v) begin
    n_t_97x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_97x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_97x <= n_t_97x_m;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_95x)
  if (~n3v) begin
    n_t_79x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_79x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_79x_m <= n_t_95x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_79x_m)
  if (~n3v) begin
    n_t_79x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_79x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_79x <= n_t_79x_m;
  end
// e42: sn7474 
always @(freq_div, init, tpcnow_l, 1'b0)
  if (init) begin
    enable_m <= 1'b0;
  end else
  if (~tpcnow_l) begin
    enable_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    enable_m <= 1'b0;
  end
always @(freq_div, init, tpcnow_l, enable_m)
  if (init) begin
    enable <= 1'b0;
  end else
  if (~tpcnow_l) begin
    enable <= 1'b1;
  end else
  if (~freq_div) begin
    enable <= enable_m;
  end
always @(rx_clk, n3v, clear_rx_flag, set_last)
  if (~n3v) begin
    rx_flag_l_m <= 1'b0;
  end else
  if (~clear_rx_flag) begin
    rx_flag_l_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    rx_flag_l_m <= ~set_last;
  end
always @(rx_clk, n3v, clear_rx_flag, rx_flag_l_m)
  if (~n3v) begin
    rx_flag_l <= 1'b0;
  end else
  if (~clear_rx_flag) begin
    rx_flag_l <= 1'b1;
  end else
  if (rx_clk) begin
    rx_flag_l <= rx_flag_l_m;
  end
// e43: sp384n 
assign n_t_11x = data4_l
                  | tpcnow_l;
assign n_t_12x = data5_l
                  | tpcnow_l;
assign n_t_10x = data6_l
                  | tpcnow_l;
assign n_t_9x = tpcnow_l
                 | data7_l;
// e44: sn7474 
always @(freq_div, init, n_t_12x, n_t_13x)
  if (init) begin
    n_t_14x_m <= 1'b0;
  end else
  if (~n_t_12x) begin
    n_t_14x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_14x_m <= n_t_13x;
  end
always @(freq_div, init, n_t_12x, n_t_14x_m)
  if (init) begin
    n_t_14x <= 1'b0;
  end else
  if (~n_t_12x) begin
    n_t_14x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_14x <= n_t_14x_m;
  end
always @(freq_div, init, n_t_10x, n_t_14x)
  if (init) begin
    n_t_15x_m <= 1'b0;
  end else
  if (~n_t_10x) begin
    n_t_15x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_15x_m <= n_t_14x;
  end
always @(freq_div, init, n_t_10x, n_t_15x_m)
  if (init) begin
    n_t_15x <= 1'b0;
  end else
  if (~n_t_10x) begin
    n_t_15x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_15x <= n_t_15x_m;
  end
// e45: sn7474 
always @(freq_div, init, n_t_11x, enable)
  if (init) begin
    n_t_13x_m <= 1'b0;
  end else
  if (~n_t_11x) begin
    n_t_13x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_13x_m <= enable;
  end
always @(freq_div, init, n_t_11x, n_t_13x_m)
  if (init) begin
    n_t_13x <= 1'b0;
  end else
  if (~n_t_11x) begin
    n_t_13x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_13x <= n_t_13x_m;
  end
always @(freq_div, init, n_t_9x, n_t_15x)
  if (init) begin
    n_t_16x_m <= 1'b0;
  end else
  if (~n_t_9x) begin
    n_t_16x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_16x_m <= n_t_15x;
  end
always @(freq_div, init, n_t_9x, n_t_16x_m)
  if (init) begin
    n_t_16x <= 1'b0;
  end else
  if (~n_t_9x) begin
    n_t_16x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_16x <= n_t_16x_m;
  end
// e46: sn7474 
always @(freq_div, dtx_active_l, xmit_active, n_t_28x)
  if (~dtx_active_l) begin
    n_t_31x_m <= 1'b0;
  end else
  if (~xmit_active) begin
    n_t_31x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_31x_m <= n_t_28x;
  end
always @(freq_div, dtx_active_l, xmit_active, n_t_31x_m)
  if (~dtx_active_l) begin
    n_t_31x <= 1'b0;
  end else
  if (~xmit_active) begin
    n_t_31x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_31x <= n_t_31x_m;
  end
always @(rr_clk, init, set_rr_l, 1'b0)
  if (init) begin
    n_t_117x_m <= 1'b0;
  end else
  if (~set_rr_l) begin
    n_t_117x_m <= 1'b1;
  end else
  if (~(rr_clk)) begin
    n_t_117x_m <= 1'b0;
  end
always @(rr_clk, init, set_rr_l, n_t_117x_m)
  if (init) begin
    n_t_117x <= 1'b0;
  end else
  if (~set_rr_l) begin
    n_t_117x <= 1'b1;
  end else
  if (rr_clk) begin
    n_t_117x <= n_t_117x_m;
  end
assign n_t_114x = ~n_t_117x;
// e47: sp384n 
assign n_t_5x = data8_l
                 | tpcnow_l;
assign n_t_4x = data9_l
                 | tpcnow_l;
assign n_t_3x = data10_l
                 | tpcnow_l;
assign n_t_2x = tpcnow_l
                 | data11_l;
// e48: sn7474 
always @(freq_div, init, n_t_4x, n_t_17x)
  if (init) begin
    n_t_18x_m <= 1'b0;
  end else
  if (~n_t_4x) begin
    n_t_18x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_18x_m <= n_t_17x;
  end
always @(freq_div, init, n_t_4x, n_t_18x_m)
  if (init) begin
    n_t_18x <= 1'b0;
  end else
  if (~n_t_4x) begin
    n_t_18x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_18x <= n_t_18x_m;
  end
always @(freq_div, init, n_t_3x, n_t_18x)
  if (init) begin
    n_t_6x_m <= 1'b0;
  end else
  if (~n_t_3x) begin
    n_t_6x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_6x_m <= n_t_18x;
  end
always @(freq_div, init, n_t_3x, n_t_6x_m)
  if (init) begin
    n_t_6x <= 1'b0;
  end else
  if (~n_t_3x) begin
    n_t_6x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_6x <= n_t_6x_m;
  end
// e49: sn7474 
always @(freq_div, init, n_t_5x, n_t_16x)
  if (init) begin
    n_t_17x_m <= 1'b0;
  end else
  if (~n_t_5x) begin
    n_t_17x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_17x_m <= n_t_16x;
  end
always @(freq_div, init, n_t_5x, n_t_17x_m)
  if (init) begin
    n_t_17x <= 1'b0;
  end else
  if (~n_t_5x) begin
    n_t_17x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_17x <= n_t_17x_m;
  end
always @(freq_div, init, n_t_2x, n_t_6x)
  if (init) begin
    n_t_28x_m <= 1'b0;
  end else
  if (~n_t_2x) begin
    n_t_28x_m <= 1'b1;
  end else
  if (~(~freq_div)) begin
    n_t_28x_m <= n_t_6x;
  end
always @(freq_div, init, n_t_2x, n_t_28x_m)
  if (init) begin
    n_t_28x <= 1'b0;
  end else
  if (~n_t_2x) begin
    n_t_28x <= 1'b1;
  end else
  if (~freq_div) begin
    n_t_28x <= n_t_28x_m;
  end
// e50: sn7401 
// data11_l = !(n_t_93x & read_buffer); 
// data10_l = !(n_t_101x & read_buffer); 
// data9_l = !(read_buffer & n_t_100x); 
// data8_l = !(read_buffer & n_t_99x); 
// e51: sn7474 
always @(rx_clk, n3v, rx_clr_l, n_t_101x)
  if (~n3v) begin
    n_t_93x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_93x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_93x_m <= n_t_101x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_93x_m)
  if (~n3v) begin
    n_t_93x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_93x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_93x <= n_t_93x_m;
  end
assign set_last = ~n_t_93x;
always @(rx_clk, n3v, rx_clr_l, n_t_98x)
  if (~n3v) begin
    n_t_99x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_99x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_99x_m <= n_t_98x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_99x_m)
  if (~n3v) begin
    n_t_99x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_99x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_99x <= n_t_99x_m;
  end
// e52: sn7474 
always @(rx_clk, n3v, rx_clr_l, n_t_100x)
  if (~n3v) begin
    n_t_101x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_101x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_101x_m <= n_t_100x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_101x_m)
  if (~n3v) begin
    n_t_101x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_101x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_101x <= n_t_101x_m;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_99x)
  if (~n3v) begin
    n_t_100x_m <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_100x_m <= 1'b1;
  end else
  if (~(rx_clk)) begin
    n_t_100x_m <= n_t_99x;
  end
always @(rx_clk, n3v, rx_clr_l, n_t_100x_m)
  if (~n3v) begin
    n_t_100x <= 1'b0;
  end else
  if (~rx_clr_l) begin
    n_t_100x <= 1'b1;
  end else
  if (rx_clk) begin
    n_t_100x <= n_t_100x_m;
  end
// open collector 'wire-or's 
assign c0_l = dokcc? ~dokcc: 1'bz;
assign c1_l = dokcc
               | read_buffer? 1'b0: 1'bz;
assign data10_l = (n_t_101x & read_buffer)? 1'b0: 1'bz;
assign data11_l = (n_t_93x & read_buffer)? 1'b0: 1'bz;
assign data4_l = (read_buffer & n_t_95x)? 1'b0: 1'bz;
assign data5_l = (read_buffer & n_t_79x)? 1'b0: 1'bz;
assign data6_l = (n_t_97x & read_buffer)? 1'b0: 1'bz;
assign data7_l = (n_t_98x & read_buffer)? 1'b0: 1'bz;
assign data8_l = (read_buffer & n_t_99x)? 1'b0: 1'bz;
assign data9_l = (read_buffer & n_t_100x)? 1'b0: 1'bz;
assign int_rqst_l = (n_t_44x & int_ena)? 1'b0: 1'bz;
assign internal_io_l = n603x
                        | n604x? 1'b0: 1'bz;
assign n604_l = n604x? ~n604x: 1'bz;
assign n_t_105x = n_t_107x
                   | (~(1'b0))? 1'b0: 1'bz;
assign n_t_111x = n_t_105x? ~n_t_105x: 1'bz;
assign skip_l = (n_t_46x & n_t_44x)
                 | n_t_39x
                 | n_t_43x? 1'b0: 1'bz;
assign tpcnow_l = (tp3 & dotpc)? 1'b0: 1'bz;
endmodule