// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
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// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// c18: c_us 
// c19: c_us 
// c20: c_us 
// c21: c_us 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c25: c_us 
// c26: c_us 
// c27: c_us 
// c28: c_us 
// c29: c_us 
// c30: c_us 
// c31: c_us 
// c32: c_us 
// c33: c_us 
// c34: cpol_use 
// c35: cpol_use 
// c36: cpol_use 
// c37: c_us 
// c38: c_us 
// c39: c_us 
// c40: c_us 
// c41: c_us 
// c42: c_us 
// c43: c_us 
// c44: c_us 
// c45: c_us 
// c46: cpol_use 
// c47: c_us 
// c48: c_us 
// e01: sn74h04 
module m868h (cc_t_m_en, cc_tpg_clk_l, df_sel_er_l, n_t_108x, n_t_110x, n_t_17x, n_t_1x, n_t_53x, n_t_5x, n_t_61x, n_t_62x, n_t_78x, n_t_79x, n_t_81x, n_t_82x, n_t_84x, n_t_92x, n_t_94x, n_t_95x, c0, c1, cc_67x_l, cc_dtp, cc_setdly, cc_tpg_clk, cc_tt_en, con_all_halt, data00, data01, data02, data03, data04, data05, data06, data07, data08, data09, data10, data11, f_not_r, initialize, internal_io, io_pause, md03, md04, md05, md06, md07, md08, md09, md10, md11, n15v, n_t_112x, n_t_20x, n_t_33x, n_t_38x, n_t_39x, n_t_65x, n_t_67x, n_t_6x, n_t_72x, n_t_73x, n_t_74x, n_t_77x, n_t_80x, n_t_90x, n_t_96x, nd0, nd1, nd2, power_ok_l, rd00, rd01, rd02, rmt, rtt_l, run, s_not_g, sel_echo, skip_l, t_m_enable, tp3, tp4, unith, wd_enab, wpt, wrt_echo);
input cc_t_m_en;
output cc_tpg_clk_l;
input df_sel_er_l;
output n_t_108x;
output n_t_110x;
input n_t_17x;
input n_t_1x;
input n_t_53x;
input n_t_5x;
input n_t_61x;
input n_t_62x;
output n_t_78x;
output n_t_79x;
output n_t_81x;
output n_t_82x;
input n_t_84x;
input n_t_92x;
output n_t_94x;
output n_t_95x;
output c0;
output c1;
inout cc_67x_l;
input cc_dtp;
inout cc_setdly;
input cc_tpg_clk;
output cc_tt_en;
output con_all_halt;
inout data00;
inout data01;
inout data02;
inout data03;
inout data04;
inout data05;
inout data06;
inout data07;
inout data08;
inout data09;
inout data10;
inout data11;
output f_not_r;
input initialize;
output internal_io;
input io_pause;
input md03;
input md04;
input md05;
input md06;
input md07;
input md08;
input md09;
input md10;
input md11;
output n15v;
output n_t_112x;
inout n_t_20x;
inout n_t_33x;
inout n_t_38x;
inout n_t_39x;
output n_t_65x;
output n_t_67x;
inout n_t_6x;
inout n_t_72x;
inout n_t_73x;
inout n_t_74x;
output n_t_77x;
input n_t_80x;
inout n_t_90x;
input n_t_96x;
output nd0;
output nd1;
output nd2;
input power_ok_l;
input rd00;
input rd01;
input rd02;
input rmt;
input rtt_l;
input run;
output s_not_g;
output sel_echo;
output skip_l;
output t_m_enable;
input tp3;
input tp4;
output unith;
output wd_enab;
inout wpt;
output wrt_echo;

reg cc_f_r_m;
reg cc_r_w_m;
reg cc_s_g_m;
reg cc_setdly_l_m;
reg cc_tpg1_m;
reg cc_unit_m;
reg cc_uts_m;
reg gdollar_0_m;
reg gdollar_2_m;
reg gdollar_3_m;
reg gdollar_4_m;
reg gdollar_5_m;
reg gdollar_6_m;
reg gdollar_7_m;
reg mtr0_l_m;
reg mtr1_l_m;
reg mtr2_l_m;
reg mtr3_l_m;
reg mtr4_l_m;
reg mtr5_l_m;
reg n_t_101x_m;
reg n_t_25x_m;
reg n_t_36x_m;
reg sr00_m;
reg sr01_m;
reg sr02_m;
reg sr03_m;
reg sr04_m;
reg sr05_m;
reg sr06_m;
reg sr07_m;
reg sr08_m;
reg sr09_m;
reg sr10_m;
reg sr11_m;
reg sync_m;
reg tpg0_m;

reg cc_setdly_l;
reg cc_uts;
reg sr11;
reg sr08;
reg sr05;
reg sr02;
reg n_t_101x;
reg sync;
reg sr10;
reg sr07;
reg sr04;
reg sr01;
reg gdollar_0;
reg gdollar_1;
reg gdollar_2;
reg gdollar_3;
reg cc_tpg1;
reg tpg0;
reg sr09;
reg sr06;
reg sr03;
reg sr00;
reg mtr5_l;
reg mtr4_l;
reg mtr3_l;
reg mtr2_l;
reg mtr1_l;
reg mtr0_l;
reg gdollar_4;
reg gdollar_5;
reg cc_s_g;
reg cc_r_w;
reg cc_f_r;
reg cc_unit;
reg n_t_25x;
reg gdollar_6;
reg gdollar_7;
reg n_t_36x;
wire cc_67x;
wire cc_clk_te_l;
wire cc_dtp0;
wire cc_dtp1;
wire cc_sdlc_l;
wire cc_sdld_l;
wire cc_sdrc_l;
wire cc_sdrd_l;
wire cc_sdsq_l;
wire cc_sdss_l;
wire cc_sdst_l;
wire cc_wrt_ok;
wire df_comp_wd;
wire df_db00;
wire df_db01;
wire df_db02;
wire df_db03;
wire df_hld_l;
wire df_time_er;
wire df_time_er_l;
wire n_t_100x;
wire n_t_104x;
wire n_t_106x;
wire n_t_109x;
wire n_t_11x;
wire n_t_13x;
wire n_t_14x;
wire n_t_16x;
wire n_t_18x;
wire n_t_22x;
wire n_t_29x;
wire n_t_2x;
wire n_t_31x;
wire n_t_37x;
wire n_t_3x;
wire n_t_41x;
wire n_t_42x;
wire n_t_43x;
wire n_t_47x;
wire n_t_49x;
wire n_t_4x;
wire n_t_50x;
wire n_t_68x;
wire n_t_69x;
wire n_t_70x;
wire n_t_71x;
wire n_t_85x;
wire n_t_86x;
wire n_t_87x;
wire n_t_89x;
wire n_t_8x;
wire n_t_97x;
wire n_t_98x;
wire n_t_9x;
assign n_t_112x = ~cc_tpg_clk;
// e02: sn7402 
assign n_t_2x = ~(~tp3
                   | cc_sdld_l);
assign n_t_97x = ~(cc_setdly
                    | ~cc_s_g);
assign n_t_89x = ~(n_t_86x
                    | cc_t_m_en);
assign n_t_98x = ~(~cc_uts
                    | cc_t_m_en);
// e03: sn7474 
always @(cc_clk_te_l, n_t_92x, n_t_87x, n_t_90x)
  if (~n_t_92x) begin
    cc_setdly_l_m <= 1'b0;
  end else
  if (~n_t_87x) begin
    cc_setdly_l_m <= 1'b1;
  end else
  if (~(~cc_clk_te_l)) begin
    cc_setdly_l_m <= n_t_90x;
  end
always @(cc_clk_te_l, n_t_92x, n_t_87x, cc_setdly_l_m)
  if (~n_t_92x) begin
    cc_setdly_l <= 1'b0;
  end else
  if (~n_t_87x) begin
    cc_setdly_l <= 1'b1;
  end else
  if (~cc_clk_te_l) begin
    cc_setdly_l <= cc_setdly_l_m;
  end
assign cc_setdly = ~cc_setdly_l;
always @(n_t_96x, n_t_97x, cc_t_m_en, n_t_97x)
  if (~n_t_97x) begin
    cc_uts_m <= 1'b0;
  end else
  if (cc_t_m_en) begin
    cc_uts_m <= 1'b1;
  end else
  if (~(n_t_96x)) begin
    cc_uts_m <= n_t_97x;
  end
always @(n_t_96x, n_t_97x, cc_t_m_en, cc_uts_m)
  if (~n_t_97x) begin
    cc_uts <= 1'b0;
  end else
  if (cc_t_m_en) begin
    cc_uts <= 1'b1;
  end else
  if (n_t_96x) begin
    cc_uts <= cc_uts_m;
  end
// e05: dec8235 
// data03 = !(cc_r_w & !cc_sdrc_l
//       # sr03 & !cc_sdrd_l); 
// data02 = !(cc_s_g & !cc_sdrc_l
//       # sr02 & !cc_sdrd_l); 
// data00 = !(cc_unit & !cc_sdrc_l
//       # sr00 & !cc_sdrd_l); 
// data01 = !(cc_f_r & !cc_sdrc_l
//       # sr01 & !cc_sdrd_l); 
// e06: dec8271 
always @(n_t_29x, n_t_1x, rd02, cc_sdld_l, n_t_14x, n_t_1x, cc_sdld_l, sr11, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr11_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr11_m <= rd02 & cc_sdld_l
                 | n_t_14x & n_t_1x & ~cc_sdld_l
                 | sr11 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr11_m)
  if (~n_t_1x) begin
    sr11 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr11 <= sr11_m;
  end
always @(n_t_29x, n_t_1x, sr11, cc_sdld_l, n_t_13x, n_t_1x, cc_sdld_l, sr08, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr08_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr08_m <= sr11 & cc_sdld_l
                 | n_t_13x & n_t_1x & ~cc_sdld_l
                 | sr08 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr08_m)
  if (~n_t_1x) begin
    sr08 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr08 <= sr08_m;
  end
always @(n_t_29x, n_t_1x, sr08, cc_sdld_l, n_t_16x, n_t_1x, cc_sdld_l, sr05, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr05_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr05_m <= sr08 & cc_sdld_l
                 | n_t_16x & n_t_1x & ~cc_sdld_l
                 | sr05 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr05_m)
  if (~n_t_1x) begin
    sr05 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr05 <= sr05_m;
  end
always @(n_t_29x, n_t_1x, sr05, cc_sdld_l, df_db02, n_t_1x, cc_sdld_l, sr02, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr02_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr02_m <= sr05 & cc_sdld_l
                 | df_db02 & n_t_1x & ~cc_sdld_l
                 | sr02 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr02_m)
  if (~n_t_1x) begin
    sr02 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr02 <= sr02_m;
  end
// e07: sp380n 
assign n_t_13x = ~(data08
                    | cc_67x_l);
assign n_t_14x = ~(cc_67x_l
                    | data11);
assign df_db02 = ~(cc_67x_l
                    | data02);
assign n_t_16x = ~(cc_67x_l
                    | data05);
// e09: sn7474 
always @(n_t_80x, cc_uts, n_t_17x, n_t_98x)
  if (~cc_uts) begin
    n_t_101x_m <= 1'b0;
  end else
  if (~n_t_17x) begin
    n_t_101x_m <= 1'b1;
  end else
  if (~(n_t_80x)) begin
    n_t_101x_m <= n_t_98x;
  end
always @(n_t_80x, cc_uts, n_t_17x, n_t_101x_m)
  if (~cc_uts) begin
    n_t_101x <= 1'b0;
  end else
  if (~n_t_17x) begin
    n_t_101x <= 1'b1;
  end else
  if (n_t_80x) begin
    n_t_101x <= n_t_101x_m;
  end
always @(n_t_80x, n_t_17x, n_t_17x, sync)
  if (~n_t_17x) begin
    sync_m <= 1'b0;
  end else
  if (~n_t_17x) begin
    sync_m <= 1'b1;
  end else
  if (~(n_t_80x)) begin
    sync_m <= ~sync;
  end
always @(n_t_80x, n_t_17x, n_t_17x, sync_m)
  if (~n_t_17x) begin
    sync <= 1'b0;
  end else
  if (~n_t_17x) begin
    sync <= 1'b1;
  end else
  if (n_t_80x) begin
    sync <= sync_m;
  end
// e10: dec8235 
// data07 = !(!mtr1_l & !cc_sdrc_l
//       # sr07 & !cc_sdrd_l); 
// data06 = !(!mtr0_l & !cc_sdrc_l
//       # sr06 & !cc_sdrd_l); 
// data04 = !(!df_hld_l & !cc_sdrc_l
//       # sr04 & !cc_sdrd_l); 
// data05 = !(!n_t_41x & !cc_sdrc_l
//       # sr05 & !cc_sdrd_l); 
// e11: dec8271 
always @(n_t_29x, n_t_1x, rd01, cc_sdld_l, n_t_9x, n_t_1x, cc_sdld_l, sr10, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr10_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr10_m <= rd01 & cc_sdld_l
                 | n_t_9x & n_t_1x & ~cc_sdld_l
                 | sr10 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr10_m)
  if (~n_t_1x) begin
    sr10 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr10 <= sr10_m;
  end
always @(n_t_29x, n_t_1x, sr10, cc_sdld_l, n_t_8x, n_t_1x, cc_sdld_l, sr07, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr07_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr07_m <= sr10 & cc_sdld_l
                 | n_t_8x & n_t_1x & ~cc_sdld_l
                 | sr07 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr07_m)
  if (~n_t_1x) begin
    sr07 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr07 <= sr07_m;
  end
always @(n_t_29x, n_t_1x, sr07, cc_sdld_l, n_t_11x, n_t_1x, cc_sdld_l, sr04, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr04_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr04_m <= sr07 & cc_sdld_l
                 | n_t_11x & n_t_1x & ~cc_sdld_l
                 | sr04 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr04_m)
  if (~n_t_1x) begin
    sr04 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr04 <= sr04_m;
  end
always @(n_t_29x, n_t_1x, sr04, cc_sdld_l, df_db01, n_t_1x, cc_sdld_l, sr01, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr01_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr01_m <= sr04 & cc_sdld_l
                 | df_db01 & n_t_1x & ~cc_sdld_l
                 | sr01 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr01_m)
  if (~n_t_1x) begin
    sr01 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr01 <= sr01_m;
  end
// e12: sp380n 
assign n_t_8x = ~(cc_67x_l
                   | data07);
assign n_t_9x = ~(cc_67x_l
                   | data10);
assign df_db01 = ~(data01
                    | cc_67x_l);
assign n_t_11x = ~(cc_67x_l
                    | data04);
// e13: sn7475 
always @(cc_dtp0, sr02, cc_dtp0, sr02, 1'b0)
  if (cc_dtp0 & ~sr02) begin
    gdollar_0_m <= 1'b0;
  end else
  if (cc_dtp0 & sr02) begin
    gdollar_0_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    gdollar_0_m <= 1'b0;
  end
always @(cc_dtp0, sr02, cc_dtp0, sr02, gdollar_0_m)
  if (cc_dtp0 & ~sr02) begin
    gdollar_0 <= 1'b0;
  end else
  if (cc_dtp0 & sr02) begin
    gdollar_0 <= 1'b1;
  end else
  if (1'b0) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(posedge 1'b0)
  if (1'b0) begin
    gdollar_1 <= 1'b0;
  end
always @(cc_dtp0, sr00, cc_dtp0, sr00, 1'b0)
  if (cc_dtp0 & ~sr00) begin
    gdollar_2_m <= 1'b0;
  end else
  if (cc_dtp0 & sr00) begin
    gdollar_2_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    gdollar_2_m <= 1'b0;
  end
always @(cc_dtp0, sr00, cc_dtp0, sr00, gdollar_2_m)
  if (cc_dtp0 & ~sr00) begin
    gdollar_2 <= 1'b0;
  end else
  if (cc_dtp0 & sr00) begin
    gdollar_2 <= 1'b1;
  end else
  if (1'b0) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(cc_dtp0, sr01, cc_dtp0, sr01, 1'b0)
  if (cc_dtp0 & ~sr01) begin
    gdollar_3_m <= 1'b0;
  end else
  if (cc_dtp0 & sr01) begin
    gdollar_3_m <= 1'b1;
  end else
  if (~(1'b0)) begin
    gdollar_3_m <= 1'b0;
  end
always @(cc_dtp0, sr01, cc_dtp0, sr01, gdollar_3_m)
  if (cc_dtp0 & ~sr01) begin
    gdollar_3 <= 1'b0;
  end else
  if (cc_dtp0 & sr01) begin
    gdollar_3 <= 1'b1;
  end else
  if (1'b0) begin
    gdollar_3 <= gdollar_3_m;
  end
// e14: sn7474 
always @(cc_tpg_clk, n_t_17x, n_t_17x, wpt)
  if (~n_t_17x) begin
    cc_tpg1_m <= 1'b0;
  end else
  if (~n_t_17x) begin
    cc_tpg1_m <= 1'b1;
  end else
  if (~(cc_tpg_clk)) begin
    cc_tpg1_m <= ~wpt;
  end
always @(cc_tpg_clk, n_t_17x, n_t_17x, cc_tpg1_m)
  if (~n_t_17x) begin
    cc_tpg1 <= 1'b0;
  end else
  if (~n_t_17x) begin
    cc_tpg1 <= 1'b1;
  end else
  if (cc_tpg_clk) begin
    cc_tpg1 <= cc_tpg1_m;
  end
always @(cc_tpg_clk, n_t_17x, n_t_17x, cc_tpg1)
  if (~n_t_17x) begin
    tpg0_m <= 1'b0;
  end else
  if (~n_t_17x) begin
    tpg0_m <= 1'b1;
  end else
  if (~(cc_tpg_clk)) begin
    tpg0_m <= cc_tpg1;
  end
always @(cc_tpg_clk, n_t_17x, n_t_17x, tpg0_m)
  if (~n_t_17x) begin
    tpg0 <= 1'b0;
  end else
  if (~n_t_17x) begin
    tpg0 <= 1'b1;
  end else
  if (cc_tpg_clk) begin
    tpg0 <= tpg0_m;
  end
// e15: dec8235 
// data11 = !(!mtr5_l & !cc_sdrc_l
//       # sr11 & !cc_sdrd_l); 
// data10 = !(!mtr4_l & !cc_sdrc_l
//       # sr10 & !cc_sdrd_l); 
// data08 = !(!mtr2_l & !cc_sdrc_l
//       # sr08 & !cc_sdrd_l); 
// data09 = !(!mtr3_l & !cc_sdrc_l
//       # sr09 & !cc_sdrd_l); 
// e16: dec8271 
always @(n_t_29x, n_t_1x, rd00, cc_sdld_l, n_t_4x, n_t_1x, cc_sdld_l, sr09, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr09_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr09_m <= rd00 & cc_sdld_l
                 | n_t_4x & n_t_1x & ~cc_sdld_l
                 | sr09 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr09_m)
  if (~n_t_1x) begin
    sr09 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr09 <= sr09_m;
  end
always @(n_t_29x, n_t_1x, sr09, cc_sdld_l, n_t_3x, n_t_1x, cc_sdld_l, sr06, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr06_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr06_m <= sr09 & cc_sdld_l
                 | n_t_3x & n_t_1x & ~cc_sdld_l
                 | sr06 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr06_m)
  if (~n_t_1x) begin
    sr06 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr06 <= sr06_m;
  end
always @(n_t_29x, n_t_1x, sr06, cc_sdld_l, df_db03, n_t_1x, cc_sdld_l, sr03, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr03_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr03_m <= sr06 & cc_sdld_l
                 | df_db03 & n_t_1x & ~cc_sdld_l
                 | sr03 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr03_m)
  if (~n_t_1x) begin
    sr03 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr03 <= sr03_m;
  end
always @(n_t_29x, n_t_1x, sr03, cc_sdld_l, df_db00, n_t_1x, cc_sdld_l, sr00, n_t_1x, cc_sdld_l)
  if (~n_t_1x) begin
    sr00_m <= 1'b0;
  end else
  if (~(n_t_29x)) begin
    sr00_m <= sr03 & cc_sdld_l
                 | df_db00 & n_t_1x & ~cc_sdld_l
                 | sr00 & ~n_t_1x & ~cc_sdld_l;
  end
always @(n_t_29x, n_t_1x, sr00_m)
  if (~n_t_1x) begin
    sr00 <= 1'b0;
  end else
  if (n_t_29x) begin
    sr00 <= sr00_m;
  end
// e17: sp380n 
assign n_t_3x = ~(cc_67x_l
                   | data06);
assign n_t_4x = ~(cc_67x_l
                   | data09);
assign df_db00 = ~(cc_67x_l
                    | data00);
assign df_db03 = ~(cc_67x_l
                    | data03);
// e18: dec8242 
// n_t_90x = !(!cc_f_r & !df_db01
//        # cc_f_r & df_db01); 
// n_t_39x = !(!df_comp_wd & gdollar_2
//        # df_comp_wd & !gdollar_2); 
// n_t_38x = !(gdollar_3 & !df_comp_wd
//        # !gdollar_3 & df_comp_wd); 
// n_t_33x = !(!df_comp_wd & gdollar_0
//        # df_comp_wd & !gdollar_0); 
// e19: sn7400 
assign cc_dtp1 = ~(n_t_106x & n_t_104x);
assign cc_dtp0 = ~(n_t_109x & n_t_100x);
assign cc_tt_en = ~(n_t_80x & n_t_73x);
assign n_t_68x = ~(~cc_wrt_ok & cc_sdlc_l);
// e20: sp380n 
assign n_t_65x = ~(io_pause
                    | md07);
assign n_t_67x = ~(md08
                    | io_pause);
// e21: dec8271 
always @(n_t_31x, n_t_5x, rmt, cc_uts, n_t_5x, cc_uts, mtr5_l, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    mtr5_l_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    mtr5_l_m <= rmt & cc_uts
                   | n_t_5x & ~cc_uts
                   | mtr5_l & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, mtr5_l_m)
  if (~n_t_5x) begin
    mtr5_l <= 1'b0;
  end else
  if (~n_t_31x) begin
    mtr5_l <= mtr5_l_m;
  end
always @(n_t_31x, n_t_5x, mtr5_l, cc_uts, n_t_5x, cc_uts, mtr4_l, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    mtr4_l_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    mtr4_l_m <= mtr5_l & cc_uts
                   | n_t_5x & ~cc_uts
                   | mtr4_l & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, mtr4_l_m)
  if (~n_t_5x) begin
    mtr4_l <= 1'b0;
  end else
  if (~n_t_31x) begin
    mtr4_l <= mtr4_l_m;
  end
always @(n_t_31x, n_t_5x, mtr4_l, cc_uts, n_t_5x, cc_uts, mtr3_l, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    mtr3_l_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    mtr3_l_m <= mtr4_l & cc_uts
                   | n_t_5x & ~cc_uts
                   | mtr3_l & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, mtr3_l_m)
  if (~n_t_5x) begin
    mtr3_l <= 1'b0;
  end else
  if (~n_t_31x) begin
    mtr3_l <= mtr3_l_m;
  end
always @(n_t_31x, n_t_5x, mtr3_l, cc_uts, n_t_5x, cc_uts, mtr2_l, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    mtr2_l_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    mtr2_l_m <= mtr3_l & cc_uts
                   | n_t_5x & ~cc_uts
                   | mtr2_l & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, mtr2_l_m)
  if (~n_t_5x) begin
    mtr2_l <= 1'b0;
  end else
  if (~n_t_31x) begin
    mtr2_l <= mtr2_l_m;
  end
// e22: sn7400 
assign df_comp_wd = ~(n_t_37x & ~cc_dtp0);
assign n_t_31x = ~(cc_setdly_l & ~cc_dtp1);
assign n_t_29x = ~(~cc_dtp1 & ~n_t_2x);
assign n_t_37x = ~(~cc_dtp1 & df_comp_wd);
// e23: sn7410 
assign n_t_104x = ~(cc_dtp & cc_t_m_en & tpg0);
assign n_t_100x = ~(~wpt & cc_t_m_en & cc_dtp);
assign n_t_106x = ~(n_t_101x & cc_dtp & ~sync);
// e24: sp314n 
assign cc_67x = ~(md04
                   | md05
                   | md06
                   | md03
                   | io_pause
                   | n_t_61x
                   | n_t_62x);
// e26: sn7404 
assign cc_67x_l = ~cc_67x;
// e27: sn7410 
assign df_time_er_l = ~(~initialize & cc_clk_te_l & df_time_er);
assign n_t_22x = ~(cc_sdrc_l & cc_sdrd_l & cc_sdld_l);
assign n_t_109x = ~(n_t_101x & cc_dtp & sync);
// e28: sp384n 
// e29: dec8271 
always @(n_t_31x, n_t_5x, mtr2_l, cc_uts, n_t_5x, cc_uts, mtr1_l, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    mtr1_l_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    mtr1_l_m <= mtr2_l & cc_uts
                   | n_t_5x & ~cc_uts
                   | mtr1_l & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, mtr1_l_m)
  if (~n_t_5x) begin
    mtr1_l <= 1'b0;
  end else
  if (~n_t_31x) begin
    mtr1_l <= mtr1_l_m;
  end
always @(n_t_31x, n_t_5x, mtr1_l, cc_uts, n_t_5x, cc_uts, mtr0_l, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    mtr0_l_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    mtr0_l_m <= mtr1_l & cc_uts
                   | n_t_5x & ~cc_uts
                   | mtr0_l & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, mtr0_l_m)
  if (~n_t_5x) begin
    mtr0_l <= 1'b0;
  end else
  if (~n_t_31x) begin
    mtr0_l <= mtr0_l_m;
  end
always @(n_t_31x, n_t_5x, mtr0_l, cc_uts, n_t_5x, cc_uts, gdollar_4, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    gdollar_4_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    gdollar_4_m <= mtr0_l & cc_uts
                      | n_t_5x & ~cc_uts
                      | gdollar_4 & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, gdollar_4_m)
  if (~n_t_5x) begin
    gdollar_4 <= 1'b0;
  end else
  if (~n_t_31x) begin
    gdollar_4 <= gdollar_4_m;
  end
always @(n_t_31x, n_t_5x, gdollar_4, cc_uts, n_t_5x, cc_uts, gdollar_5, n_t_5x, cc_uts)
  if (~n_t_5x) begin
    gdollar_5_m <= 1'b0;
  end else
  if (~(~n_t_31x)) begin
    gdollar_5_m <= gdollar_4 & cc_uts
                      | n_t_5x & ~cc_uts
                      | gdollar_5 & ~n_t_5x & ~cc_uts;
  end
always @(n_t_31x, n_t_5x, gdollar_5_m)
  if (~n_t_5x) begin
    gdollar_5 <= 1'b0;
  end else
  if (~n_t_31x) begin
    gdollar_5 <= gdollar_5_m;
  end
// e30: sn7474 
always @(cc_clk_te_l, n_t_18x, n_t_84x, df_db02)
  if (~n_t_18x) begin
    cc_s_g_m <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_s_g_m <= 1'b1;
  end else
  if (~(~cc_clk_te_l)) begin
    cc_s_g_m <= df_db02;
  end
always @(cc_clk_te_l, n_t_18x, n_t_84x, cc_s_g_m)
  if (~n_t_18x) begin
    cc_s_g <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_s_g <= 1'b1;
  end else
  if (~cc_clk_te_l) begin
    cc_s_g <= cc_s_g_m;
  end
always @(cc_clk_te_l, n_t_68x, n_t_84x, df_db03)
  if (~n_t_68x) begin
    cc_r_w_m <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_r_w_m <= 1'b1;
  end else
  if (~(~cc_clk_te_l)) begin
    cc_r_w_m <= df_db03;
  end
always @(cc_clk_te_l, n_t_68x, n_t_84x, cc_r_w_m)
  if (~n_t_68x) begin
    cc_r_w <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_r_w <= 1'b1;
  end else
  if (~cc_clk_te_l) begin
    cc_r_w <= cc_r_w_m;
  end
// e31: sn7404 
// e32: sn7404 
assign df_hld_l = ~n_t_53x;
// e33: n8881n 
// c1 = !(n_t_69x & n_t_70x); 
// internal_io = !cc_67x; 
// c0 = !(n_t_69x & cc_sdld_l); 
// e34: sn7474 
always @(cc_clk_te_l, initialize, n_t_84x, df_db01)
  if (initialize) begin
    cc_f_r_m <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_f_r_m <= 1'b1;
  end else
  if (~(~cc_clk_te_l)) begin
    cc_f_r_m <= df_db01;
  end
always @(cc_clk_te_l, initialize, n_t_84x, cc_f_r_m)
  if (initialize) begin
    cc_f_r <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_f_r <= 1'b1;
  end else
  if (~cc_clk_te_l) begin
    cc_f_r <= cc_f_r_m;
  end
always @(cc_clk_te_l, initialize, n_t_84x, df_db00)
  if (initialize) begin
    cc_unit_m <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_unit_m <= 1'b1;
  end else
  if (~(~cc_clk_te_l)) begin
    cc_unit_m <= df_db00;
  end
always @(cc_clk_te_l, initialize, n_t_84x, cc_unit_m)
  if (initialize) begin
    cc_unit <= 1'b0;
  end else
  if (~n_t_84x) begin
    cc_unit <= 1'b1;
  end else
  if (~cc_clk_te_l) begin
    cc_unit <= cc_unit_m;
  end
// e35: sn7410 
assign n_t_49x = ~(~cc_r_w & cc_dtp1 & ~n_t_47x);
assign df_time_er = ~(n_t_49x & n_t_50x & df_time_er_l);
assign n_t_50x = ~(cc_dtp0 & cc_r_w & ~n_t_47x);
// e36: sn7493 
always @(cc_dtp1, n_t_42x, n_t_25x)
  if (n_t_42x) begin
    n_t_25x_m <= 1'b0;
  end else
  if (~(~cc_dtp1)) begin
    n_t_25x_m <= ~n_t_25x;
  end
always @(cc_dtp1, n_t_42x, n_t_25x_m)
  if (n_t_42x) begin
    n_t_25x <= 1'b0;
  end else
  if (~cc_dtp1) begin
    n_t_25x <= n_t_25x_m;
  end
always @(cc_dtp1, n_t_42x, gdollar_6)
  if (n_t_42x) begin
    gdollar_6_m <= 1'b0;
  end else
  if (~(~cc_dtp1)) begin
    gdollar_6_m <= ~gdollar_6;
  end
always @(cc_dtp1, n_t_42x, gdollar_6_m)
  if (n_t_42x) begin
    gdollar_6 <= 1'b0;
  end else
  if (~cc_dtp1) begin
    gdollar_6 <= gdollar_6_m;
  end
always @(gdollar_6, n_t_42x, gdollar_7)
  if (n_t_42x) begin
    gdollar_7_m <= 1'b0;
  end else
  if (~(~gdollar_6)) begin
    gdollar_7_m <= ~gdollar_7;
  end
always @(gdollar_6, n_t_42x, gdollar_7_m)
  if (n_t_42x) begin
    gdollar_7 <= 1'b0;
  end else
  if (~gdollar_6) begin
    gdollar_7 <= gdollar_7_m;
  end
always @(gdollar_7, n_t_42x, n_t_36x)
  if (n_t_42x) begin
    n_t_36x_m <= 1'b0;
  end else
  if (~(~gdollar_7)) begin
    n_t_36x_m <= ~n_t_36x;
  end
always @(gdollar_7, n_t_42x, n_t_36x_m)
  if (n_t_42x) begin
    n_t_36x <= 1'b0;
  end else
  if (~gdollar_7) begin
    n_t_36x <= n_t_36x_m;
  end
// e37: sn7402 
assign n_t_47x = ~(n_t_22x
                    | n_t_36x);
assign n_t_41x = ~(df_time_er
                    | ~df_sel_er_l);
assign n_t_18x = ~(initialize
                    | run);
assign cc_clk_te_l = ~(~(~tp3
                          | cc_sdlc_l));
// e38: sn7400 
assign n_t_43x = ~(n_t_22x & tp3);
assign n_t_42x = ~(n_t_43x & cc_uts);
assign n_t_86x = ~(cc_r_w & n_t_85x);
assign n_t_85x = ~(n_t_86x & ~cc_dtp0);
// e39: sn7417 
// nd2 = !n_t_33x; 
// nd1 = !n_t_38x; 
// wpt = wpt; 
// f_not_r = cc_f_r; 
// unith = !cc_unit; 
// nd0 = !n_t_39x; 
// e40: sn7430 
assign cc_wrt_ok = ~(~(df_time_er_l & df_hld_l & ~run &  & df_sel_er_l &  & power_ok_l & ~initialize));
// e41: n8881n 
// skip_l = !(df_time_er & !cc_sdst_l); 
// skip_l = !(n_t_25x & !cc_sdss_l); 
// skip_l = !(!cc_sdsq_l & n_t_36x); 
// e42: dec8242 
// n_t_74x = !(cc_tpg1 & !sync
//        # !cc_tpg1 & sync); 
// n_t_72x = !(!sync & !rtt_l
//        # sync & rtt_l); 
// n_t_90x = !(!cc_unit & !df_db00
//        # cc_unit & df_db00); 
// n_t_90x = !(!cc_s_g & !df_db02
//        # cc_s_g & df_db02); 
// e43: sn7401 
// n_t_73x = !(!cc_t_m_en & n_t_72x); 
// n_t_73x = !(n_t_74x & cc_t_m_en); 
// n_t_20x = !(cc_s_g & n_t_6x); 
// n_t_6x = !(n_t_20x & n_t_87x); 
// e44: sp380n 
assign n_t_87x = ~(initialize
                    | tp4);
assign n_t_69x = ~(cc_67x_l
                    | md09);
assign n_t_70x = ~(md10
                    | cc_67x_l);
assign n_t_71x = ~(md11
                    | cc_67x_l);
// e45: dec8251 
assign cc_sdss_l = ~(~cc_67x_l & ~n_t_69x & ~n_t_70x & n_t_71x);
assign cc_sdst_l = ~(~cc_67x_l & ~n_t_69x & n_t_70x & ~n_t_71x);
assign cc_sdsq_l = ~(~cc_67x_l & ~n_t_69x & n_t_70x & n_t_71x);
assign cc_sdlc_l = ~(~cc_67x_l & n_t_69x & ~n_t_70x & ~n_t_71x);
assign cc_sdld_l = ~(~cc_67x_l & n_t_69x & ~n_t_70x & n_t_71x);
assign cc_sdrc_l = ~(~cc_67x_l & n_t_69x & n_t_70x & ~n_t_71x);
assign cc_sdrd_l = ~(~cc_67x_l & n_t_69x & n_t_70x & n_t_71x);
// e46: sn7401 
// con_all_halt = !run; 
// t_m_enable = !(cc_t_m_en & cc_wrt_ok); 
// wd_enab = !(n_t_89x & power_ok_l); 
// s_not_g = !(!n_t_20x & power_ok_l); 
// open collector 'wire-or's 
assign c0 = (n_t_69x & cc_sdld_l)? 1'b0: 1'bz;
assign c1 = (n_t_69x & n_t_70x)? 1'b0: 1'bz;
assign con_all_halt = run? ~run: 1'bz;
assign data00 = (cc_unit & ~cc_sdrc_l
                  | sr00 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data01 = (cc_f_r & ~cc_sdrc_l
                  | sr01 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data02 = (cc_s_g & ~cc_sdrc_l
                  | sr02 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data03 = (cc_r_w & ~cc_sdrc_l
                  | sr03 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data04 = (~df_hld_l & ~cc_sdrc_l
                  | sr04 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data05 = (~n_t_41x & ~cc_sdrc_l
                  | sr05 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data06 = (~mtr0_l & ~cc_sdrc_l
                  | sr06 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data07 = (~mtr1_l & ~cc_sdrc_l
                  | sr07 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data08 = (~mtr2_l & ~cc_sdrc_l
                  | sr08 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data09 = (~mtr3_l & ~cc_sdrc_l
                  | sr09 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data10 = (~mtr4_l & ~cc_sdrc_l
                  | sr10 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign data11 = (~mtr5_l & ~cc_sdrc_l
                  | sr11 & ~cc_sdrd_l)? 1'b0: 1'bz;
assign f_not_r = ~cc_f_r? 1'b0: 1'bz;
assign internal_io = cc_67x? ~cc_67x: 1'bz;
assign n_t_20x = (cc_s_g & n_t_6x)? 1'b0: 1'bz;
assign n_t_33x = (~df_comp_wd & gdollar_0
                   | df_comp_wd & ~gdollar_0)? 1'b0: 1'bz;
assign n_t_38x = (gdollar_3 & ~df_comp_wd
                   | ~gdollar_3 & df_comp_wd)? 1'b0: 1'bz;
assign n_t_39x = (~df_comp_wd & gdollar_2
                   | df_comp_wd & ~gdollar_2)? 1'b0: 1'bz;
assign n_t_6x = (n_t_20x & n_t_87x)? 1'b0: 1'bz;
assign n_t_72x = (~sync & ~rtt_l
                   | sync & rtt_l)? 1'b0: 1'bz;
assign n_t_73x = (~cc_t_m_en & n_t_72x)
                  | (n_t_74x & cc_t_m_en)? 1'b0: 1'bz;
assign n_t_74x = (cc_tpg1 & ~sync
                   | ~cc_tpg1 & sync)? 1'b0: 1'bz;
assign n_t_90x = (~cc_f_r & ~df_db01
                   | cc_f_r & df_db01)
                  | (~cc_unit & ~df_db00
                     | cc_unit & df_db00)
                  | (~cc_s_g & ~df_db02
                     | cc_s_g & df_db02)? 1'b0: 1'bz;
assign nd0 = n_t_39x? ~n_t_39x: 1'bz;
assign nd1 = n_t_38x? ~n_t_38x: 1'bz;
assign nd2 = n_t_33x? ~n_t_33x: 1'bz;
assign s_not_g = (~n_t_20x & power_ok_l)? 1'b0: 1'bz;
assign skip_l = (df_time_er & ~cc_sdst_l)
                 | (n_t_25x & ~cc_sdss_l)
                 | (~cc_sdsq_l & n_t_36x)? 1'b0: 1'bz;
assign t_m_enable = (cc_t_m_en & cc_wrt_ok)? 1'b0: 1'bz;
assign unith = cc_unit? ~cc_unit: 1'bz;
assign wd_enab = (n_t_89x & power_ok_l)? 1'b0: 1'bz;
assign wpt = ~(~(~tpg0))? ~(~tpg0): 1'bz;
endmodule