// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: cpol_use 
// c15: cpol_use 
// c16: cpol_use 
// c17: cpol_use 
// c18: cpol_use 
// c19: cpol_use 
// c21: cpol_use 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c26: cpol_use 
// c28: c_us 
// c29: c_us 
// c30: cpol_use 
// c31: c_us 
// c32: cpol_use 
// c33: c_us 
// c34: c_us 
// c35: c_us 
// c36: c_us 
// c37: c_us 
// c38: cpol_use 
// c39: c_us 
// c40: cpol_use 
// c41: c_us 
// e1: sn74193 
module m885e (bit10, bit11, load_en_l, load_x, load_y, n_t_103x, n_t_105x, n_t_132x, n_t_156x, n_t_27x, n_t_52x, x_ac_l, x_dec, x_inc, y_ac_l, y_dec, y_inc, chan_l, col_red_l, data02_l, data03_l, data04_l, data05_l, data06_l, data07_l, data08_l, data09_l, data10_l, data11_l, erase_interval_l, erase_l, n15v, n5v_x, n5v_y, n_t_107x, n_t_121x, n_t_145x, n_t_76x, n_t_91x, non_store_l, write_thru_l, x03, x04, x05, x06, x07, x08, x09, x10, x11, x_analog, y03, y04, y05, y06, y07, y08, y09, y10, y11, y_analog, z_axis);
input bit10;
input bit11;
input load_en_l;
input load_x;
input load_y;
output n_t_103x;
output n_t_105x;
output n_t_132x;
output n_t_156x;
output n_t_27x;
output n_t_52x;
input x_ac_l;
input x_dec;
input x_inc;
input y_ac_l;
input y_dec;
input y_inc;
output chan_l;
output col_red_l;
inout data02_l;
inout data03_l;
inout data04_l;
inout data05_l;
inout data06_l;
inout data07_l;
inout data08_l;
inout data09_l;
output data10_l;
output data11_l;
output erase_interval_l;
output erase_l;
output n15v;
output n5v_x;
output n5v_y;
output n_t_107x;
output n_t_121x;
output n_t_145x;
output n_t_76x;
output n_t_91x;
output non_store_l;
output write_thru_l;
inout reg x03;
inout reg x04;
inout reg x05;
inout reg x06;
inout reg x07;
inout reg x08;
inout reg x09;
inout reg x10;
inout reg x11;
output x_analog;
inout reg y03;
inout reg y04;
inout reg y05;
inout reg y06;
inout reg y07;
inout reg y08;
inout reg y09;
inout reg y10;
inout reg y11;
output y_analog;
output z_axis;

reg gdollar_0_m;
reg gdollar_1_m;
reg gdollar_2_m;
reg gdollar_3_m;
reg x02_m;
reg x03_m;
reg x04_m;
reg x05_m;
reg x06_m;
reg x07_m;
reg x08_m;
reg x09_m;
reg x10_m;
reg x11_m;
reg y02_m;
reg y03_m;
reg y04_m;
reg y05_m;
reg y06_m;
reg y07_m;
reg y08_m;
reg y09_m;
reg y10_m;
reg y11_m;

reg y02;
reg gdollar_0;
reg gdollar_1;
reg x02;
reg gdollar_2;
reg gdollar_3;
wire di02;
wire di03;
wire di04;
wire di05;
wire di06;
wire di07;
wire di08;
wire di09;
wire n_t_10x;
wire n_t_12x;
wire n_t_14x;
wire n_t_21x;
wire n_t_22x;
wire n_t_23x;
wire n_t_24x;
wire n_t_6x;
always @(n_t_6x, n_t_10x, load_y, di03, load_y, di03, y03)
  if (~load_y & ~di03) begin
    y03_m <= 1'b0;
  end else
  if (~load_y & di03) begin
    y03_m <= 1'b1;
  end else
  if (~(~(~n_t_6x
                   | ~n_t_10x))) begin
    y03_m <= ~y03;
  end
always @(n_t_6x, n_t_10x, load_y, di03, load_y, di03, y03_m)
  if (~load_y & ~di03) begin
    y03 <= 1'b0;
  end else
  if (~load_y & di03) begin
    y03 <= 1'b1;
  end else
  if (~(~n_t_6x
                   | ~n_t_10x)) begin
    y03 <= y03_m;
  end
always @(n_t_6x, y03, n_t_10x, y03, load_y, di02, load_y, di02, y02)
  if (~load_y & ~di02) begin
    y02_m <= 1'b0;
  end else
  if (~load_y & di02) begin
    y02_m <= 1'b1;
  end else
  if (~(~(~n_t_6x & ~y03
                   | ~n_t_10x & y03))) begin
    y02_m <= ~y02;
  end
always @(n_t_6x, y03, n_t_10x, y03, load_y, di02, load_y, di02, y02_m)
  if (~load_y & ~di02) begin
    y02 <= 1'b0;
  end else
  if (~load_y & di02) begin
    y02 <= 1'b1;
  end else
  if (~(~n_t_6x & ~y03
                   | ~n_t_10x & y03)) begin
    y02 <= y02_m;
  end
always @(n_t_6x, y03, y02, n_t_10x, y03, y02, load_y, gdollar_0)
  if (~load_y) begin
    gdollar_0_m <= 1'b0;
  end else
  if (~(~(~n_t_6x & ~y03 & ~y02
                         | ~n_t_10x & y03 & y02))) begin
    gdollar_0_m <= ~gdollar_0;
  end
always @(n_t_6x, y03, y02, n_t_10x, y03, y02, load_y, gdollar_0_m)
  if (~load_y) begin
    gdollar_0 <= 1'b0;
  end else
  if (~(~n_t_6x & ~y03 & ~y02
                         | ~n_t_10x & y03 & y02)) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(n_t_6x, gdollar_0, y03, y02, n_t_10x, gdollar_0, y03, y02, load_y, gdollar_1)
  if (~load_y) begin
    gdollar_1_m <= 1'b0;
  end else
  if (~(~(~n_t_6x & ~gdollar_0 & ~y03 & ~y02
                         | ~n_t_10x & gdollar_0 & y03 & y02))) begin
    gdollar_1_m <= ~gdollar_1;
  end
always @(n_t_6x, gdollar_0, y03, y02, n_t_10x, gdollar_0, y03, y02, load_y, gdollar_1_m)
  if (~load_y) begin
    gdollar_1 <= 1'b0;
  end else
  if (~(~n_t_6x & ~gdollar_0 & ~y03 & ~y02
                         | ~n_t_10x & gdollar_0 & y03 & y02)) begin
    gdollar_1 <= gdollar_1_m;
  end
// e2: sn74193 
always @(n_t_21x, n_t_22x, load_x, di03, load_x, di03, x03)
  if (~load_x & ~di03) begin
    x03_m <= 1'b0;
  end else
  if (~load_x & di03) begin
    x03_m <= 1'b1;
  end else
  if (~(~(~n_t_21x
                   | ~n_t_22x))) begin
    x03_m <= ~x03;
  end
always @(n_t_21x, n_t_22x, load_x, di03, load_x, di03, x03_m)
  if (~load_x & ~di03) begin
    x03 <= 1'b0;
  end else
  if (~load_x & di03) begin
    x03 <= 1'b1;
  end else
  if (~(~n_t_21x
                   | ~n_t_22x)) begin
    x03 <= x03_m;
  end
always @(n_t_21x, x03, n_t_22x, x03, load_x, di02, load_x, di02, x02)
  if (~load_x & ~di02) begin
    x02_m <= 1'b0;
  end else
  if (~load_x & di02) begin
    x02_m <= 1'b1;
  end else
  if (~(~(~n_t_21x & ~x03
                   | ~n_t_22x & x03))) begin
    x02_m <= ~x02;
  end
always @(n_t_21x, x03, n_t_22x, x03, load_x, di02, load_x, di02, x02_m)
  if (~load_x & ~di02) begin
    x02 <= 1'b0;
  end else
  if (~load_x & di02) begin
    x02 <= 1'b1;
  end else
  if (~(~n_t_21x & ~x03
                   | ~n_t_22x & x03)) begin
    x02 <= x02_m;
  end
always @(n_t_21x, x03, x02, n_t_22x, x03, x02, load_x, gdollar_2)
  if (~load_x) begin
    gdollar_2_m <= 1'b0;
  end else
  if (~(~(~n_t_21x & ~x03 & ~x02
                         | ~n_t_22x & x03 & x02))) begin
    gdollar_2_m <= ~gdollar_2;
  end
always @(n_t_21x, x03, x02, n_t_22x, x03, x02, load_x, gdollar_2_m)
  if (~load_x) begin
    gdollar_2 <= 1'b0;
  end else
  if (~(~n_t_21x & ~x03 & ~x02
                         | ~n_t_22x & x03 & x02)) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(n_t_21x, gdollar_2, x03, x02, n_t_22x, gdollar_2, x03, x02, load_x, gdollar_3)
  if (~load_x) begin
    gdollar_3_m <= 1'b0;
  end else
  if (~(~(~n_t_21x & ~gdollar_2 & ~x03 & ~x02
                         | ~n_t_22x & gdollar_2 & x03 & x02))) begin
    gdollar_3_m <= ~gdollar_3;
  end
always @(n_t_21x, gdollar_2, x03, x02, n_t_22x, gdollar_2, x03, x02, load_x, gdollar_3_m)
  if (~load_x) begin
    gdollar_3 <= 1'b0;
  end else
  if (~(~n_t_21x & ~gdollar_2 & ~x03 & ~x02
                         | ~n_t_22x & gdollar_2 & x03 & x02)) begin
    gdollar_3 <= gdollar_3_m;
  end
// e3: sp380n 
assign di03 = ~(data03_l
                 | load_en_l);
assign di02 = ~(load_en_l
                 | data02_l);
assign di09 = ~(data09_l
                 | load_en_l);
assign di08 = ~(load_en_l
                 | data08_l);
// e4: sn74193 
always @(n_t_12x, n_t_14x, load_y, di07, load_y, di07, y07)
  if (~load_y & ~di07) begin
    y07_m <= 1'b0;
  end else
  if (~load_y & di07) begin
    y07_m <= 1'b1;
  end else
  if (~(~(~n_t_12x
                   | ~n_t_14x))) begin
    y07_m <= ~y07;
  end
always @(n_t_12x, n_t_14x, load_y, di07, load_y, di07, y07_m)
  if (~load_y & ~di07) begin
    y07 <= 1'b0;
  end else
  if (~load_y & di07) begin
    y07 <= 1'b1;
  end else
  if (~(~n_t_12x
                   | ~n_t_14x)) begin
    y07 <= y07_m;
  end
always @(n_t_12x, y07, n_t_14x, y07, load_y, di06, load_y, di06, y06)
  if (~load_y & ~di06) begin
    y06_m <= 1'b0;
  end else
  if (~load_y & di06) begin
    y06_m <= 1'b1;
  end else
  if (~(~(~n_t_12x & ~y07
                   | ~n_t_14x & y07))) begin
    y06_m <= ~y06;
  end
always @(n_t_12x, y07, n_t_14x, y07, load_y, di06, load_y, di06, y06_m)
  if (~load_y & ~di06) begin
    y06 <= 1'b0;
  end else
  if (~load_y & di06) begin
    y06 <= 1'b1;
  end else
  if (~(~n_t_12x & ~y07
                   | ~n_t_14x & y07)) begin
    y06 <= y06_m;
  end
always @(n_t_12x, y07, y06, n_t_14x, y07, y06, load_y, di05, load_y, di05, y05)
  if (~load_y & ~di05) begin
    y05_m <= 1'b0;
  end else
  if (~load_y & di05) begin
    y05_m <= 1'b1;
  end else
  if (~(~(~n_t_12x & ~y07 & ~y06
                   | ~n_t_14x & y07 & y06))) begin
    y05_m <= ~y05;
  end
always @(n_t_12x, y07, y06, n_t_14x, y07, y06, load_y, di05, load_y, di05, y05_m)
  if (~load_y & ~di05) begin
    y05 <= 1'b0;
  end else
  if (~load_y & di05) begin
    y05 <= 1'b1;
  end else
  if (~(~n_t_12x & ~y07 & ~y06
                   | ~n_t_14x & y07 & y06)) begin
    y05 <= y05_m;
  end
always @(n_t_12x, y05, y07, y06, n_t_14x, y05, y07, y06, load_y, di04, load_y, di04, y04)
  if (~load_y & ~di04) begin
    y04_m <= 1'b0;
  end else
  if (~load_y & di04) begin
    y04_m <= 1'b1;
  end else
  if (~(~(~n_t_12x & ~y05 & ~y07 & ~y06
                   | ~n_t_14x & y05 & y07 & y06))) begin
    y04_m <= ~y04;
  end
always @(n_t_12x, y05, y07, y06, n_t_14x, y05, y07, y06, load_y, di04, load_y, di04, y04_m)
  if (~load_y & ~di04) begin
    y04 <= 1'b0;
  end else
  if (~load_y & di04) begin
    y04 <= 1'b1;
  end else
  if (~(~n_t_12x & ~y05 & ~y07 & ~y06
                   | ~n_t_14x & y05 & y07 & y06)) begin
    y04 <= y04_m;
  end
assign n_t_10x = y07 & y06 & y05 & y04;
assign n_t_6x = ~y07 & ~y06 & ~y05 & ~y04;
// e5: sn74193 
always @(n_t_23x, n_t_24x, load_x, di07, load_x, di07, x07)
  if (~load_x & ~di07) begin
    x07_m <= 1'b0;
  end else
  if (~load_x & di07) begin
    x07_m <= 1'b1;
  end else
  if (~(~(~n_t_23x
                   | ~n_t_24x))) begin
    x07_m <= ~x07;
  end
always @(n_t_23x, n_t_24x, load_x, di07, load_x, di07, x07_m)
  if (~load_x & ~di07) begin
    x07 <= 1'b0;
  end else
  if (~load_x & di07) begin
    x07 <= 1'b1;
  end else
  if (~(~n_t_23x
                   | ~n_t_24x)) begin
    x07 <= x07_m;
  end
always @(n_t_23x, x07, n_t_24x, x07, load_x, di06, load_x, di06, x06)
  if (~load_x & ~di06) begin
    x06_m <= 1'b0;
  end else
  if (~load_x & di06) begin
    x06_m <= 1'b1;
  end else
  if (~(~(~n_t_23x & ~x07
                   | ~n_t_24x & x07))) begin
    x06_m <= ~x06;
  end
always @(n_t_23x, x07, n_t_24x, x07, load_x, di06, load_x, di06, x06_m)
  if (~load_x & ~di06) begin
    x06 <= 1'b0;
  end else
  if (~load_x & di06) begin
    x06 <= 1'b1;
  end else
  if (~(~n_t_23x & ~x07
                   | ~n_t_24x & x07)) begin
    x06 <= x06_m;
  end
always @(n_t_23x, x07, x06, n_t_24x, x07, x06, load_x, di05, load_x, di05, x05)
  if (~load_x & ~di05) begin
    x05_m <= 1'b0;
  end else
  if (~load_x & di05) begin
    x05_m <= 1'b1;
  end else
  if (~(~(~n_t_23x & ~x07 & ~x06
                   | ~n_t_24x & x07 & x06))) begin
    x05_m <= ~x05;
  end
always @(n_t_23x, x07, x06, n_t_24x, x07, x06, load_x, di05, load_x, di05, x05_m)
  if (~load_x & ~di05) begin
    x05 <= 1'b0;
  end else
  if (~load_x & di05) begin
    x05 <= 1'b1;
  end else
  if (~(~n_t_23x & ~x07 & ~x06
                   | ~n_t_24x & x07 & x06)) begin
    x05 <= x05_m;
  end
always @(n_t_23x, x05, x07, x06, n_t_24x, x05, x07, x06, load_x, di04, load_x, di04, x04)
  if (~load_x & ~di04) begin
    x04_m <= 1'b0;
  end else
  if (~load_x & di04) begin
    x04_m <= 1'b1;
  end else
  if (~(~(~n_t_23x & ~x05 & ~x07 & ~x06
                   | ~n_t_24x & x05 & x07 & x06))) begin
    x04_m <= ~x04;
  end
always @(n_t_23x, x05, x07, x06, n_t_24x, x05, x07, x06, load_x, di04, load_x, di04, x04_m)
  if (~load_x & ~di04) begin
    x04 <= 1'b0;
  end else
  if (~load_x & di04) begin
    x04 <= 1'b1;
  end else
  if (~(~n_t_23x & ~x05 & ~x07 & ~x06
                   | ~n_t_24x & x05 & x07 & x06)) begin
    x04 <= x04_m;
  end
assign n_t_22x = x07 & x06 & x05 & x04;
assign n_t_21x = ~x07 & ~x06 & ~x05 & ~x04;
// e6: sp380n 
assign di04 = ~(data04_l
                 | load_en_l);
assign di05 = ~(load_en_l
                 | data05_l);
assign di06 = ~(load_en_l
                 | data06_l);
assign di07 = ~(load_en_l
                 | data07_l);
// e7: sn74193 
always @(y_dec, y_inc, load_y, bit11, load_y, bit11, y11)
  if (~load_y & ~bit11) begin
    y11_m <= 1'b0;
  end else
  if (~load_y & bit11) begin
    y11_m <= 1'b1;
  end else
  if (~(~(~y_dec
                   | ~y_inc))) begin
    y11_m <= ~y11;
  end
always @(y_dec, y_inc, load_y, bit11, load_y, bit11, y11_m)
  if (~load_y & ~bit11) begin
    y11 <= 1'b0;
  end else
  if (~load_y & bit11) begin
    y11 <= 1'b1;
  end else
  if (~(~y_dec
                   | ~y_inc)) begin
    y11 <= y11_m;
  end
always @(y_dec, y11, y_inc, y11, load_y, bit10, load_y, bit10, y10)
  if (~load_y & ~bit10) begin
    y10_m <= 1'b0;
  end else
  if (~load_y & bit10) begin
    y10_m <= 1'b1;
  end else
  if (~(~(~y_dec & ~y11
                   | ~y_inc & y11))) begin
    y10_m <= ~y10;
  end
always @(y_dec, y11, y_inc, y11, load_y, bit10, load_y, bit10, y10_m)
  if (~load_y & ~bit10) begin
    y10 <= 1'b0;
  end else
  if (~load_y & bit10) begin
    y10 <= 1'b1;
  end else
  if (~(~y_dec & ~y11
                   | ~y_inc & y11)) begin
    y10 <= y10_m;
  end
always @(y_dec, y11, y10, y_inc, y11, y10, load_y, di09, load_y, di09, y09)
  if (~load_y & ~di09) begin
    y09_m <= 1'b0;
  end else
  if (~load_y & di09) begin
    y09_m <= 1'b1;
  end else
  if (~(~(~y_dec & ~y11 & ~y10
                   | ~y_inc & y11 & y10))) begin
    y09_m <= ~y09;
  end
always @(y_dec, y11, y10, y_inc, y11, y10, load_y, di09, load_y, di09, y09_m)
  if (~load_y & ~di09) begin
    y09 <= 1'b0;
  end else
  if (~load_y & di09) begin
    y09 <= 1'b1;
  end else
  if (~(~y_dec & ~y11 & ~y10
                   | ~y_inc & y11 & y10)) begin
    y09 <= y09_m;
  end
always @(y_dec, y09, y11, y10, y_inc, y09, y11, y10, load_y, di08, load_y, di08, y08)
  if (~load_y & ~di08) begin
    y08_m <= 1'b0;
  end else
  if (~load_y & di08) begin
    y08_m <= 1'b1;
  end else
  if (~(~(~y_dec & ~y09 & ~y11 & ~y10
                   | ~y_inc & y09 & y11 & y10))) begin
    y08_m <= ~y08;
  end
always @(y_dec, y09, y11, y10, y_inc, y09, y11, y10, load_y, di08, load_y, di08, y08_m)
  if (~load_y & ~di08) begin
    y08 <= 1'b0;
  end else
  if (~load_y & di08) begin
    y08 <= 1'b1;
  end else
  if (~(~y_dec & ~y09 & ~y11 & ~y10
                   | ~y_inc & y09 & y11 & y10)) begin
    y08 <= y08_m;
  end
assign n_t_14x = y11 & y10 & y09 & y08;
assign n_t_12x = ~y11 & ~y10 & ~y09 & ~y08;
// e8: sn74193 
always @(x_dec, x_inc, load_x, bit11, load_x, bit11, x11)
  if (~load_x & ~bit11) begin
    x11_m <= 1'b0;
  end else
  if (~load_x & bit11) begin
    x11_m <= 1'b1;
  end else
  if (~(~(~x_dec
                   | ~x_inc))) begin
    x11_m <= ~x11;
  end
always @(x_dec, x_inc, load_x, bit11, load_x, bit11, x11_m)
  if (~load_x & ~bit11) begin
    x11 <= 1'b0;
  end else
  if (~load_x & bit11) begin
    x11 <= 1'b1;
  end else
  if (~(~x_dec
                   | ~x_inc)) begin
    x11 <= x11_m;
  end
always @(x_dec, x11, x_inc, x11, load_x, bit10, load_x, bit10, x10)
  if (~load_x & ~bit10) begin
    x10_m <= 1'b0;
  end else
  if (~load_x & bit10) begin
    x10_m <= 1'b1;
  end else
  if (~(~(~x_dec & ~x11
                   | ~x_inc & x11))) begin
    x10_m <= ~x10;
  end
always @(x_dec, x11, x_inc, x11, load_x, bit10, load_x, bit10, x10_m)
  if (~load_x & ~bit10) begin
    x10 <= 1'b0;
  end else
  if (~load_x & bit10) begin
    x10 <= 1'b1;
  end else
  if (~(~x_dec & ~x11
                   | ~x_inc & x11)) begin
    x10 <= x10_m;
  end
always @(x_dec, x11, x10, x_inc, x11, x10, load_x, di09, load_x, di09, x09)
  if (~load_x & ~di09) begin
    x09_m <= 1'b0;
  end else
  if (~load_x & di09) begin
    x09_m <= 1'b1;
  end else
  if (~(~(~x_dec & ~x11 & ~x10
                   | ~x_inc & x11 & x10))) begin
    x09_m <= ~x09;
  end
always @(x_dec, x11, x10, x_inc, x11, x10, load_x, di09, load_x, di09, x09_m)
  if (~load_x & ~di09) begin
    x09 <= 1'b0;
  end else
  if (~load_x & di09) begin
    x09 <= 1'b1;
  end else
  if (~(~x_dec & ~x11 & ~x10
                   | ~x_inc & x11 & x10)) begin
    x09 <= x09_m;
  end
always @(x_dec, x09, x11, x10, x_inc, x09, x11, x10, load_x, di08, load_x, di08, x08)
  if (~load_x & ~di08) begin
    x08_m <= 1'b0;
  end else
  if (~load_x & di08) begin
    x08_m <= 1'b1;
  end else
  if (~(~(~x_dec & ~x09 & ~x11 & ~x10
                   | ~x_inc & x09 & x11 & x10))) begin
    x08_m <= ~x08;
  end
always @(x_dec, x09, x11, x10, x_inc, x09, x11, x10, load_x, di08, load_x, di08, x08_m)
  if (~load_x & ~di08) begin
    x08 <= 1'b0;
  end else
  if (~load_x & di08) begin
    x08 <= 1'b1;
  end else
  if (~(~x_dec & ~x09 & ~x11 & ~x10
                   | ~x_inc & x09 & x11 & x10)) begin
    x08 <= x08_m;
  end
assign n_t_24x = x11 & x10 & x09 & x08;
assign n_t_23x = ~x11 & ~x10 & ~x09 & ~x08;
// e9: dec8235 
// data10_l = !(y11 & !y_ac_l
//         # x11 & !x_ac_l); 
// data11_l = !(y10 & !y_ac_l
//         # x10 & !x_ac_l); 
// data09_l = !(y09 & !y_ac_l
//         # x09 & !x_ac_l); 
// data08_l = !(y08 & !y_ac_l
//         # x08 & !x_ac_l); 
// e10: sn7404 
// e11: dec8235 
// data07_l = !(y07 & !y_ac_l
//         # x07 & !x_ac_l); 
// data06_l = !(y06 & !y_ac_l
//         # x06 & !x_ac_l); 
// data05_l = !(y05 & !y_ac_l
//         # x05 & !x_ac_l); 
// data04_l = !(y04 & !y_ac_l
//         # x04 & !x_ac_l); 
// e12: sn7404 
assign n_t_76x = ~x02;
assign n_t_91x = ~y02;
// e13: dec8235 
// data03_l = !(y03 & !y_ac_l
//         # x03 & !x_ac_l); 
// data02_l = !(y02 & !y_ac_l
//         # x02 & !x_ac_l); 
// open collector 'wire-or's 
assign data02_l = (y02 & ~y_ac_l
                    | x02 & ~x_ac_l)? 1'b0: 1'bz;
assign data03_l = (y03 & ~y_ac_l
                    | x03 & ~x_ac_l)? 1'b0: 1'bz;
assign data04_l = (y04 & ~y_ac_l
                    | x04 & ~x_ac_l)? 1'b0: 1'bz;
assign data05_l = (y05 & ~y_ac_l
                    | x05 & ~x_ac_l)? 1'b0: 1'bz;
assign data06_l = (y06 & ~y_ac_l
                    | x06 & ~x_ac_l)? 1'b0: 1'bz;
assign data07_l = (y07 & ~y_ac_l
                    | x07 & ~x_ac_l)? 1'b0: 1'bz;
assign data08_l = (y08 & ~y_ac_l
                    | x08 & ~x_ac_l)? 1'b0: 1'bz;
assign data09_l = (y09 & ~y_ac_l
                    | x09 & ~x_ac_l)? 1'b0: 1'bz;
assign data10_l = (y11 & ~y_ac_l
                    | x11 & ~x_ac_l)? 1'b0: 1'bz;
assign data11_l = (y10 & ~y_ac_l
                    | x10 & ~x_ac_l)? 1'b0: 1'bz;
endmodule