Exported from /home/vrs/Eagle/projects/DEC/Mxxx/M896/M896X.sch Part Pad Pin Dir Net C1 1 1 pas VCC 2 2 pas GND C2 1 1 pas VCC 2 2 pas GND C3 1 1 pas VCC 2 2 pas GND C4 1 1 pas VCC 2 2 pas GND C5 1 1 pas VCC 2 2 pas GND C6 1 1 pas VCC 2 2 pas GND C7 1 1 pas VCC 2 2 pas GND C8 1 1 pas VCC 2 2 pas GND E1 1 I0 in VCC 2 I1 in N$8 3 O out N$11 11 O out N$6 12 I0 in B1 13 I1 in A1 E2 1 I0 in N$1 2 I1 in N$2 3 O out N$14 4 I0 in N$1 5 I1 in N$3 6 O out N$12 8 O out N$15 9 I0 in N$4 10 I1 in N$1 11 O out N$13 12 I0 in N$5 13 I1 in N$1 E3 1 I0 in N$7 2 I1 in N$4 3 I2 in N$1 4 I3 in N$10 5 I4 in N$6 6 I5 in N$11 8 O out V2 11 I6 in N$9 12 I7 in N$2 E4 1 I0 in L1 2 I1 in K1 3 O out N$3 4 I0 in H1 5 I1 in J1 6 O out N$4 8 O out N$5 9 I0 in F1 10 I1 in E1 11 O out N$7 12 I0 in D1 13 I1 in C1 E6 1 I0 in V1 2 I1 in U1 3 O out N$1 4 I0 in S1 5 I1 in R1 6 O out N$10 8 O out N$9 9 I0 in M1 10 I1 in N2 11 O out N$2 12 I0 in N1 13 I1 in P1 E7 1 CLR in M2 2 Q1 out K1 3 D1 in N$14 4 D2 in N$13 5 Q2 out D1 6 D3 in N$15 7 Q3 out F1 9 CLK in N$16 10 Q4 out U1 11 D4 in N$6 13 D5 in GND 14 D6 in GND E8 1 CLR in M2 2 Q1 out R1 3 D1 in N$1 4 D2 in N$10 5 Q2 out N2 6 D3 in N$9 7 Q3 out N1 9 CLK in N$16 10 Q4 out B1 11 D4 in N$7 12 Q5 out J1 13 D5 in N$12 14 D6 in GND IC1 1 I0 in N$12 2 I1 in N$12 3 I0 in VCC 4 I1 in VCC 5 I2 in L2 6 O out N$16 8 O out S2 9 I0 in T2 10 I1 in U2 11 I2 in V2 12 O out N$8 13 I2 in N$13 U$1 A1 1 io A1 A2 1 io VCC B1 1 io B1 C1 1 io C1 C2 1 io GND D1 1 io D1 E1 1 io E1 F1 1 io F1 H1 1 io H1 J1 1 io J1 K1 1 io K1 L1 1 io L1 L2 1 io L2 M1 1 io M1 M2 1 io M2 N1 1 io N1 N2 1 io N2 P1 1 io P1 R1 1 io R1 S1 1 io S1 S2 1 io S2 T1 1 io GND T2 1 io T2 U1 1 io U1 U2 1 io U2 V1 1 io V1 V2 1 io V2