/* This file is generated by topld.pl!! */ /* Please don't edit it. */ Name M896n ; PartNo cpld ; Date XX/XX/XXXX ; Revision 01 ; Designer ; Company ; Assembly None ; Location E1 ; Device f1508isptqfp100; $DEFINE OPTIMIZE $UNDEF OPTIMIZE /* Input Pins */ pin = a1; pin = c1; pin = e1; pin = h1; pin = l1; pin = l2; pin = m1; pin = m2; pin = p1; pin = s1; pin = t2; pin = u2; pin = v1; /* Output Pins */ pin = b1; pin = d1; pin = f1; pin = j1; pin = k1; pin = n1; pin = n2; pin = r1; pin = s2; pin = u1; pin = v2; /* Internal nodes */ $IFNDEF OPTIMIZE node n_t_10x; node n_t_11x; node n_t_12x; node n_t_13x; node n_t_14x; node n_t_15x; node n_t_16x; node n_t_1x; node n_t_2x; node n_t_3x; node n_t_4x; node n_t_5x; node n_t_6x; node n_t_7x; node n_t_8x; node n_t_9x; $ENDIF /* Code nodes */ /* Equations */ /* c1: c_us */ /* c2: c_us */ /* c3: c_us */ /* c4: c_us */ /* c5: c_us */ /* c6: c_us */ /* c7: c_us */ /* c8: c_us */ /* e1: sn7486 */ n_t_11x = !n_t_8x; n_t_6x = b1 $ a1; /* e2: sn7486 */ n_t_14x = n_t_1x $ n_t_2x; n_t_12x = n_t_1x $ n_t_3x; n_t_15x = n_t_4x $ n_t_1x; n_t_13x = n_t_5x $ n_t_1x; /* e3: sn7430 */ v2 = !(n_t_7x & n_t_4x & n_t_1x & n_t_10x & n_t_6x & n_t_11x & n_t_9x & n_t_2x); /* e4: sn7486 */ n_t_3x = l1 $ k1; n_t_4x = h1 $ j1; n_t_5x = f1 $ e1; n_t_7x = d1 $ c1; /* e6: sn7486 */ n_t_1x = v1 $ u1; n_t_10x = s1 $ r1; n_t_9x = m1 $ n2; n_t_2x = n1 $ p1; /* e7: sn74174 */ k1.ar = !m2; k1.ck = n_t_16x; k1.d = n_t_14x; d1.ar = !m2; d1.ck = n_t_16x; d1.d = n_t_13x; f1.ar = !m2; f1.ck = n_t_16x; f1.d = n_t_15x; u1.ar = !m2; u1.ck = n_t_16x; u1.d = n_t_6x; /* e8: sn74174 */ r1.ar = !m2; r1.ck = n_t_16x; r1.d = n_t_1x; n2.ar = !m2; n2.ck = n_t_16x; n2.d = n_t_10x; n1.ar = !m2; n1.ck = n_t_16x; n1.d = n_t_9x; b1.ar = !m2; b1.ck = n_t_16x; b1.d = n_t_7x; j1.ar = !m2; j1.ck = n_t_16x; j1.d = n_t_12x; /* ic1: sn7410 */ n_t_8x = !(n_t_12x & n_t_13x); n_t_16x = !l2; s2 = !(t2 & u2 & v2); /* Open collector 'wire-or's */