|cpld cf0 => ratex2.IN0 cf0 => ratex2.IN0 cf0 => ratex2.IN0 cf0 => ratex2.IN0 cf0 => ratex2.IN1 cf0 => ratex2.IN1 cf0 => ratex2.IN0 cf0 => ratex2.IN0 pulse_la => ~NO_FANOUT~ data08_l <> m8650d:m8650d.data08_l f_set_l => ~NO_FANOUT~ md11_l => md11_l.IN1 user_mode_l => ~NO_FANOUT~ md10_l => md10_l.IN1 md09_l => md09_l.IN1 d_l => ~NO_FANOUT~ md08_l => md08_l.IN1 f_l => ~NO_FANOUT~ ir01_l => ~NO_FANOUT~ ir00_l => ~NO_FANOUT~ ind2_l => ~NO_FANOUT~ ind1_l => ~NO_FANOUT~ cpma_disable_l => ~NO_FANOUT~ skip_l <= m8650d:m8650d.skip_l initialize => initialize.IN1 int_rqst_l <= m8650d:m8650d.int_rqst_l ts3_l => ~NO_FANOUT~ internal_io_l <= m8650d:m8650d.internal_io_l ts1_l => ~NO_FANOUT~ tp4 => ~NO_FANOUT~ tp3 => tp3.IN1 c1_l <= m8650d:m8650d.c1_l tp2 => ~NO_FANOUT~ c0_l <= m8650d:m8650d.c0_l io_pause_l => io_pause_l.IN1 df_enable => ~NO_FANOUT~ power_ok => power_ok.IN1 data07_l <> m8650d:m8650d.data07_l run_l => ~NO_FANOUT~ data06_l <> m8650d:m8650d.data06_l data05_l <> m8650d:m8650d.data05_l data04_l <> m8650d:m8650d.data04_l int_in_prog_l => ~NO_FANOUT~ md07_l => rx_sel_l.IN0 md07_l => rx_sel_l.IN1 md07_l => tx_sel_l.IN0 md07_l => tx_sel_l.IN1 md06_l => rx_sel_l.IN0 md06_l => rx_sel_l.IN1 md06_l => tx_sel_l.IN0 md06_l => tx_sel_l.IN1 md05_l => md05_ok.IN0 md05_l => md05_ok.IN1 md04_l => md04_ok.IN0 md04_l => md04_ok.IN1 load_cont_l => ~NO_FANOUT~ tp_bb1 => md04_set.IN0 tp_bb1 => md06_in.IN0 tp_bb1 => md06_out.IN1 tp_bb1 => md07_set.IN1 tp_bb1 => md07_set.IN1 tp_bb1 => md07_in.IN1 tp_bb1 => md07_out.IN1 tp_bb1 => md08_in.IN1 tp_bb1 => md08_in.IN1 tp_ba1 => md03_set.IN1 tp_ba1 => md03_set.IN0 tp_ba1 => md04_set.IN1 tp_ba1 => md05_set.IN1 tp_ba1 => md06_in.IN0 tp_ba1 => md06_in.IN1 tp_ba1 => md06_out.IN0 tp_ba1 => md07_set.IN1 tp_ba1 => md07_set.IN0 tp_ba1 => md07_in.IN0 tp_ba1 => md07_out.IN1 tp_ba1 => md08_in.IN0 tp_ba1 => md08_in.IN1 data03_l <> data02_l <> data01_l <> data00_l <> md03_l => md03_ok.IN0 md03_l => md03_ok.IN1 md02_l => ~NO_FANOUT~ md01_l => ~NO_FANOUT~ md00_l => ~NO_FANOUT~ ema2_l => ~NO_FANOUT~ ema1_l => ~NO_FANOUT~ ema0_l => ~NO_FANOUT~ tp_ab1 => md03_set.IN0 tp_ab1 => md03_set.IN1 tp_ab1 => md04_set.IN0 tp_ab1 => md05_set.IN0 tp_ab1 => md06_in.IN1 tp_ab1 => md06_in.IN0 tp_ab1 => md06_out.IN0 tp_ab1 => md07_set.IN0 tp_ab1 => md07_set.IN1 tp_ab1 => md07_in.IN0 tp_ab1 => md07_out.IN0 tp_ab1 => md08_in.IN0 tp_ab1 => md08_in.IN0 tp_aa1 => ratex2.IN0 tp_aa1 => ratex2.IN1 tp_aa1 => ratex2.IN0 tp_aa1 => ratex2.IN1 tp_aa1 => ratex2.IN0 tp_aa1 => ratex2.IN1 tp_aa1 => ratex2.IN0 tp_aa1 => ratex2.IN1 rxdttl <= m8650d:m8650d.serial_in txdttl <= m8650d:m8650d.line data11_l <> m8650d:m8650d.data11_l key_ctl_l => ~NO_FANOUT~ data10_l <> m8650d:m8650d.data10_l data09_l <> m8650d:m8650d.data09_l clk => ratex2.IN1 clk => bd115200.CLK cf1 => ratex2.IN0 cf1 => ratex2.IN0 cf1 => ratex2.IN1 cf1 => ratex2.IN1 cf1 => ratex2.IN0 cf1 => ratex2.IN0 cf1 => ratex2.IN1 cf1 => ratex2.IN1 |cpld|m8650d:m8650d n3v3 => always13.IN0 n3v3 => n_t_40x_m.IN1 n3v3 => n_t_146x_m.IN0 n3v3 => gdollar_7_m.IN0 n3v3 => n_t_119x_m.IN0 n3v3 => n_t_119x_m.IN1 n3v3 => n_t_60x_d.IN0 n3v3 => n_t_62x_m.IN0 n3v3 => n_t_56x_m.IN0 n3v3 => n_t_61x_m.IN0 n3v3 => n_t_63x_m.IN0 n3v3 => n_t_65x_m.IN0 n3v3 => n_t_66x_m.IN0 n3v3 => tx_data_m.IN0 n3v3 => r_run_l_m.DATAIN n3v3 => comb.IN1 n3v3 => comb.IN1 n3v3 => comb.IN1 n3v3 => comb.IN1 n3v3 => comb.IN1 n3v3 => comb.IN1 n_t_103x => n_t_57x.IN0 n_t_128x => rx20ma_data.DATAIN n_t_152x => always59.IN0 n_t_165x => rx_sel_l.IN0 n_t_1x => tx_sel_l.IN0 n_t_32x => tx_sel_l.IN1 n_t_3x => rx_sel_l.IN1 n_t_50x => rx_sel_l.IN1 n_t_58x => tx_sel_l.IN1 n_t_74x => tx_sel_l.IN1 n_t_77x <= n_t_84x => tx_sel_l.IN1 n_t_86x => rx_sel_l.IN1 n_t_90x => rx_sel_l.IN1 n_t_95x => tx_sel_l.IN1 n_t_96x => rx_sel_l.IN1 stp_mark => n_t_108x.IN0 tx_rate => always40.IN0 tx_rate => n_t_119x$latch.LATCH_ENABLE tx_rate => gdollar_7.LATCH_ENABLE tx_rate => n_t_146x$latch.LATCH_ENABLE tx_rate => tx_active_l.LATCH_ENABLE tx_rate => tx_div.LATCH_ENABLE bd1200 <= bd1200~reg0.DB_MAX_OUTPUT_PORT_TYPE bd150 <= bd150~reg0.DB_MAX_OUTPUT_PORT_TYPE bd2400 <= bd2400~reg0.DB_MAX_OUTPUT_PORT_TYPE bd300 <= bd300~reg0.DB_MAX_OUTPUT_PORT_TYPE bd600 <= bd600~reg0.DB_MAX_OUTPUT_PORT_TYPE c0_l <= c0_l.DB_MAX_OUTPUT_PORT_TYPE c1_l <= c1_l.DB_MAX_OUTPUT_PORT_TYPE data04_l <> data04_l data05_l <> data05_l data06_l <> data06_l data07_l <> data07_l data08_l <> data08_l data09_l <> data09_l data10_l <> data10_l data11_l <> data11_l dotpc_l <> dotpc_l eia_in <= eia_out <= initialize => r_run_l.IN1 initialize => spike_det_l.IN1 initialize => spike_det_l_m.IN1 initialize => tx_div_m.IN1 initialize => n_t_61x.ACLR initialize => tx_data.ACLR initialize => tx_data_m.ACLR initialize => n_t_66x.ACLR initialize => n_t_66x_m.ACLR initialize => n_t_65x.ACLR initialize => n_t_65x_m.ACLR initialize => n_t_63x.ACLR initialize => n_t_63x_m.ACLR initialize => n_t_61x_m.ACLR initialize => n_t_56x.ACLR initialize => n_t_56x_m.ACLR initialize => n_t_62x.ACLR initialize => n_t_62x_m.ACLR initialize => n_t_60x.ACLR initialize => n_t_60x_m.ACLR initialize => comb.IN0 initialize => comb.IN1 int_enab <> int_enab int_rqst_l <= int_rqst_l.DB_MAX_OUTPUT_PORT_TYPE internal_io_l <= internal_io_l.DB_MAX_OUTPUT_PORT_TYPE io_pause_l => n_t_93x.IN0 io_pause_l => n_t_59x.IN0 io_pause_l => n_t_45x.IN0 io_pause_l => rx_sel_l.IN1 io_pause_l => n_t_92x.IN0 io_pause_l => n_t_161x.IN0 io_pause_l => n_t_89x.IN0 io_pause_l => n_t_8x.IN1 io_pause_l => tx_sel_l.IN1 line <= line$latch.DB_MAX_OUTPUT_PORT_TYPE line_l <= line_l.DB_MAX_OUTPUT_PORT_TYPE md03 => n_t_45x.IN1 md04 => n_t_59x.IN1 md05 => n_t_161x.IN1 md06 => n_t_89x.IN1 md07 => n_t_92x.IN1 md08 => n_t_93x.IN1 md09 => n_t_23x.IN0 md10 => n_t_21x.IN0 md11 => n_t_25x.IN0 n15v <= n_t_119x <= n_t_119x$latch.DB_MAX_OUTPUT_PORT_TYPE n_t_146x <= n_t_146x$latch.DB_MAX_OUTPUT_PORT_TYPE n_t_161x <= n_t_161x.DB_MAX_OUTPUT_PORT_TYPE n_t_162x <= n_t_162x~reg0.DB_MAX_OUTPUT_PORT_TYPE n_t_27x <> n_t_27x n_t_30x <= n_t_30x$latch.DB_MAX_OUTPUT_PORT_TYPE n_t_45x <= n_t_45x.DB_MAX_OUTPUT_PORT_TYPE n_t_59x <= n_t_59x.DB_MAX_OUTPUT_PORT_TYPE n_t_83x => rx_data.IN0 n_t_89x <= n_t_89x.DB_MAX_OUTPUT_PORT_TYPE n_t_92x <= n_t_92x.DB_MAX_OUTPUT_PORT_TYPE n_t_93x <= n_t_93x.DB_MAX_OUTPUT_PORT_TYPE power_ok => always21.IN0 power_ok => comb.IN1 r_run_l <= r_run_l$latch.DB_MAX_OUTPUT_PORT_TYPE reader_run <= reader_run_or <= rtsdtr <= rx20ma_data <= n_t_128x.DB_MAX_OUTPUT_PORT_TYPE rx_20ma <= rx_20ma_or <= rx_active <= rx_active$latch.DB_MAX_OUTPUT_PORT_TYPE rx_data <= rx_data.DB_MAX_OUTPUT_PORT_TYPE rx_rate <= rx_rate~reg0.DB_MAX_OUTPUT_PORT_TYPE serial_in => n_t_30x_m.IN0 serial_in => n_t_81x.IN0 serial_in => n_t_71x.IN1 skip_l <> skip_l testp4 => always44.IN0 tp3 => n_t_57x.IN0 tp3 => cktcf.IN0 tp3 => ckkcc_l.IN0 tp3 => ckkcf.IN0 tx_20ma <= tx_20ma_or <= tx_active <> tx_active tx_div_l <> tx_div_l tx_sel_l <> tx_sel_l