-- Copyright (C) 1991-2013 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Altera Program License -- Subscription Agreement, Altera MegaCore Function License -- Agreement, or other applicable license agreement, including, -- without limitation, that your use is for the sole purpose of -- programming logic devices manufactured by Altera and sold by -- Altera or its authorized distributors. Please refer to the -- applicable agreement for further details. -- -- This is a Quartus II output file. It is for reporting purposes only, and is -- not intended for use as a Quartus II input file. This file cannot be used -- to make Quartus II pin assignments - for instructions on how to make pin -- assignments, please see Quartus II help. --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- -- NC : No Connect. This pin has no internal connection to the device. -- DNU : Do Not Use. This pin MUST NOT be connected. -- VCC : Dedicated power pin, which MUST be connected to VCC. -- VCCIO : Dedicated power pin, which MUST be connected to VCC -- of its bank. -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND. -- It can also be used to report unused dedicated pins. The connection -- on the board for unused dedicated pins depends on whether this will -- be used in a future design. One example is device migration. When -- using device migration, refer to the device pin-tables. If it is a -- GND pin in the pin table or if it will not be used in a future design -- for another purpose the it MUST be connected to GND. If it is an unused -- dedicated pin, then it can be connected to a valid signal on the board -- (low, high, or toggling) if that signal is required for a different -- revision of the design. -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins. -- This pin should be connected to GND. It may also be connected to a -- valid signal on the board (low, high, or toggling) if that signal -- is required for a different revision of the design. -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND -- or leave it unconnected. -- RESERVED : Unused I/O pin, which MUST be left unconnected. -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board. -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor. -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry. -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high. -- NON_MIGRATABLE: This pin cannot be migrated. --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- -- Pin directions (input, output or bidir) are based on device operating in user mode. --------------------------------------------------------------------------------- Quartus II 64-Bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition CHIP "m706" ASSIGNED TO AN: EPM7064SLC44-10 Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment ------------------------------------------------------------------------------------------------------------- init_l : 1 : input : TTL : : : Y GND+ : 2 : : : : : VCC : 3 : power : : : : RESERVED : 4 : : : : : iob8_l : 5 : output : TTL : : : Y biop4 : 6 : input : TTL : : : Y TDI : 7 : input : TTL : : : N iob7_l : 8 : output : TTL : : : Y biop2 : 9 : input : TTL : : : Y GND : 10 : gnd : : : : iob5_l : 11 : output : TTL : : : Y iob6_l : 12 : output : TTL : : : Y TMS : 13 : input : TTL : : : N biop1 : 14 : input : TTL : : : Y VCC : 15 : power : : : : iob4_l : 16 : output : TTL : : : Y iob3_l : 17 : output : TTL : : : Y iob11_l : 18 : output : TTL : : : Y iob2_l : 19 : output : TTL : : : Y iob1_l : 20 : output : TTL : : : Y iob10_l : 21 : output : TTL : : : Y GND : 22 : gnd : : : : VCC : 23 : power : : : : iob0_l : 24 : output : TTL : : : Y iob9_l : 25 : output : TTL : : : Y rx_sel : 26 : input : TTL : : : Y rx_data : 27 : input : TTL : : : Y skip_l : 28 : output : TTL : : : Y irq_l : 29 : output : TTL : : : Y GND : 30 : gnd : : : : tx_sel : 31 : input : TTL : : : Y TCK : 32 : input : TTL : : : N RESERVED : 33 : : : : : acclr_l : 34 : output : TTL : : : Y VCC : 35 : power : : : : txdttl : 36 : output : TTL : : : Y RESERVED : 37 : : : : : TDO : 38 : output : TTL : : : N RESERVED : 39 : : : : : dsrttl : 40 : output : TTL : : : Y RESERVED : 41 : : : : : GND : 42 : gnd : : : : rx_rate : 43 : input : TTL : : : Y GND+ : 44 : : : : :