TimeQuest Timing Analyzer report for m707 Sun Apr 07 23:14:05 2024 Quartus II 64-Bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. TimeQuest Timing Analyzer Summary 3. Parallel Compilation 4. Clocks 5. Fmax Summary 6. Setup Summary 7. Hold Summary 8. Recovery Summary 9. Removal Summary 10. Minimum Pulse Width Summary 11. Setup: 'tx_ratei' 12. Setup: 'm707:m707|tto_shift' 13. Setup: 'tx_ratem' 14. Setup: 'rx_rate' 15. Hold: 'rx_rate' 16. Hold: 'tx_ratei' 17. Hold: 'm707:m707|tto_shift' 18. Hold: 'tx_ratem' 19. Recovery: 'm707:m707|tto_shift' 20. Recovery: 'tx_ratei' 21. Removal: 'tx_ratei' 22. Removal: 'm707:m707|tto_shift' 23. Minimum Pulse Width: 'm707:m707|tto_shift' 24. Minimum Pulse Width: 'tx_ratei' 25. Minimum Pulse Width: 'rx_rate' 26. Minimum Pulse Width: 'tx_ratem' 27. Setup Times 28. Hold Times 29. Clock to Output Times 30. Minimum Clock to Output Times 31. Propagation Delay 32. Minimum Propagation Delay 33. Setup Transfers 34. Hold Transfers 35. Recovery Transfers 36. Removal Transfers 37. Report TCCS 38. Report RSKM 39. Unconstrained Paths 40. TimeQuest Timing Analyzer Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 1991-2013 Altera Corporation Your use of Altera Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Altera Program License Subscription Agreement, Altera MegaCore Function License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Altera and sold by Altera or its authorized distributors. Please refer to the applicable agreement for further details. +----------------------------------------------------------------------------------------+ ; TimeQuest Timing Analyzer Summary ; +--------------------+-------------------------------------------------------------------+ ; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ; ; Revision Name ; m707 ; ; Device Family ; MAX7000S ; ; Device Name ; EPM7032SLC44-10 ; ; Timing Models ; Final ; ; Delay Model ; Slow Model ; ; Rise/Fall Delays ; Unavailable ; +--------------------+-------------------------------------------------------------------+ Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time. +-------------------------------------+ ; Parallel Compilation ; +----------------------------+--------+ ; Processors ; Number ; +----------------------------+--------+ ; Number detected on machine ; 8 ; ; Maximum allowed ; 1 ; +----------------------------+--------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clocks ; +---------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-------------------------+ ; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ; +---------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-------------------------+ ; m707:m707|tto_shift ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { m707:m707|tto_shift } ; ; rx_rate ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { rx_rate } ; ; tx_ratei ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { tx_ratei } ; ; tx_ratem ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { tx_ratem } ; +---------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-------------------------+ +----------------------------------------------------------+ ; Fmax Summary ; +-----------+-----------------+---------------------+------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +-----------+-----------------+---------------------+------+ ; 100.0 MHz ; 100.0 MHz ; m707:m707|tto_shift ; ; ; 100.0 MHz ; 100.0 MHz ; tx_ratei ; ; ; 100.0 MHz ; 100.0 MHz ; tx_ratem ; ; +-----------+-----------------+---------------------+------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. +-----------------------------------------------+ ; Setup Summary ; +---------------------+---------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------+---------+---------------+ ; tx_ratei ; -13.500 ; -49.500 ; ; m707:m707|tto_shift ; -9.000 ; -90.000 ; ; tx_ratem ; -9.000 ; -9.000 ; ; rx_rate ; -6.000 ; -6.000 ; +---------------------+---------+---------------+ +---------------------------------------------+ ; Hold Summary ; +---------------------+-------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------+-------+---------------+ ; rx_rate ; 1.500 ; 0.000 ; ; tx_ratei ; 1.500 ; 0.000 ; ; m707:m707|tto_shift ; 5.000 ; 0.000 ; ; tx_ratem ; 5.000 ; 0.000 ; +---------------------+-------+---------------+ +-----------------------------------------------+ ; Recovery Summary ; +---------------------+---------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------+---------+---------------+ ; m707:m707|tto_shift ; -12.000 ; -12.000 ; ; tx_ratei ; -9.000 ; -27.000 ; +---------------------+---------+---------------+ +---------------------------------------------+ ; Removal Summary ; +---------------------+-------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------+-------+---------------+ ; tx_ratei ; 4.500 ; 0.000 ; ; m707:m707|tto_shift ; 8.000 ; 0.000 ; +---------------------+-------+---------------+ +----------------------------------------------+ ; Minimum Pulse Width Summary ; +---------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------+--------+---------------+ ; m707:m707|tto_shift ; -3.500 ; -77.000 ; ; tx_ratei ; -3.500 ; -35.000 ; ; rx_rate ; -3.500 ; -7.000 ; ; tx_ratem ; -3.500 ; -7.000 ; +---------------------+--------+---------------+ +--------------------------------------------------------------------------------------------------------------------------------------+ ; Setup: 'tx_ratei' ; +---------+-----------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +---------+-----------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; -13.500 ; m707:m707|tto[3] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[4] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[5] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[6] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[7] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[8] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[9] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[10] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -13.500 ; m707:m707|tto[11] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; -4.500 ; 8.000 ; ; -9.000 ; m707:m707|out_active ; m707:m707|out_active ; tx_ratei ; tx_ratei ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; tx_ratei ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|out_active ; m707:m707|out_stop[0] ; tx_ratei ; tx_ratei ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|out_stop[0] ; m707:m707|out_stop[1] ; tx_ratei ; tx_ratei ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|out_stop[1] ; m707:m707|out_stop[2] ; tx_ratei ; tx_ratei ; 1.000 ; 0.000 ; 8.000 ; ; -6.000 ; m707:m707|tto_shift ; m707:m707|tto_shift ; m707:m707|tto_shift ; tx_ratei ; 0.500 ; 1.500 ; 8.000 ; ; -5.500 ; m707:m707|tto_shift ; m707:m707|tto_shift ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; 1.500 ; 8.000 ; +---------+-----------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------------------+ ; Setup: 'm707:m707|tto_shift' ; +--------+-------------------+----------------------------+---------------------+---------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-------------------+----------------------------+---------------------+---------------------+--------------+------------+------------+ ; -9.000 ; m707:m707|tto[11] ; m707:m707|line ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[3] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[4] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[5] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[6] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[7] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[8] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[9] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[10] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[11] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[3] ; m707:m707|tto[4] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[10] ; m707:m707|tto[11] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[9] ; m707:m707|tto[10] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[8] ; m707:m707|tto[9] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[7] ; m707:m707|tto[8] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[6] ; m707:m707|tto[7] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[5] ; m707:m707|tto[6] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; ; -9.000 ; m707:m707|tto[4] ; m707:m707|tto[5] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 8.000 ; +--------+-------------------+----------------------------+---------------------+---------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------+ ; Setup: 'tx_ratem' ; +--------+---------------+---------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+---------------+---------------+--------------+-------------+--------------+------------+------------+ ; -9.000 ; tx_rateo~reg0 ; tx_rateo~reg0 ; tx_ratem ; tx_ratem ; 1.000 ; 0.000 ; 8.000 ; +--------+---------------+---------------+--------------+-------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------+ ; Setup: 'rx_rate' ; +--------+-----------+----------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------+----------+--------------+-------------+--------------+------------+------------+ ; -6.000 ; tx_ratem ; tx_ratem ; tx_ratem ; rx_rate ; 0.500 ; 1.500 ; 8.000 ; ; -5.500 ; tx_ratem ; tx_ratem ; tx_ratem ; rx_rate ; 1.000 ; 1.500 ; 8.000 ; +--------+-----------+----------+--------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------+ ; Hold: 'rx_rate' ; +-------+-----------+----------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------+----------+--------------+-------------+--------------+------------+------------+ ; 1.500 ; tx_ratem ; tx_ratem ; tx_ratem ; rx_rate ; 0.000 ; 1.500 ; 8.000 ; ; 2.000 ; tx_ratem ; tx_ratem ; tx_ratem ; rx_rate ; -0.500 ; 1.500 ; 8.000 ; +-------+-----------+----------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------+ ; Hold: 'tx_ratei' ; +-------+-----------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; 1.500 ; m707:m707|tto_shift ; m707:m707|tto_shift ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; 1.500 ; 8.000 ; ; 2.000 ; m707:m707|tto_shift ; m707:m707|tto_shift ; m707:m707|tto_shift ; tx_ratei ; -0.500 ; 1.500 ; 8.000 ; ; 5.000 ; m707:m707|out_active ; m707:m707|out_active ; tx_ratei ; tx_ratei ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; tx_ratei ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|out_active ; m707:m707|out_stop[0] ; tx_ratei ; tx_ratei ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|out_stop[0] ; m707:m707|out_stop[1] ; tx_ratei ; tx_ratei ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|out_stop[1] ; m707:m707|out_stop[2] ; tx_ratei ; tx_ratei ; 0.000 ; 0.000 ; 8.000 ; ; 9.500 ; m707:m707|tto[3] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[4] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[5] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[6] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[7] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[8] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[9] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[10] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; ; 9.500 ; m707:m707|tto[11] ; m707:m707|out_active ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; -4.500 ; 8.000 ; +-------+-----------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------+ ; Hold: 'm707:m707|tto_shift' ; +-------+-------------------+----------------------------+---------------------+---------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------+----------------------------+---------------------+---------------------+--------------+------------+------------+ ; 5.000 ; m707:m707|tto[11] ; m707:m707|line ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[3] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[4] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[5] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[6] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[7] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[8] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[9] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[10] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[11] ; m707:m707|teleprinter_flag ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[3] ; m707:m707|tto[4] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[10] ; m707:m707|tto[11] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[9] ; m707:m707|tto[10] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[8] ; m707:m707|tto[9] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[7] ; m707:m707|tto[8] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[6] ; m707:m707|tto[7] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[5] ; m707:m707|tto[6] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; ; 5.000 ; m707:m707|tto[4] ; m707:m707|tto[5] ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 8.000 ; +-------+-------------------+----------------------------+---------------------+---------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------+ ; Hold: 'tx_ratem' ; +-------+---------------+---------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------+---------------+--------------+-------------+--------------+------------+------------+ ; 5.000 ; tx_rateo~reg0 ; tx_rateo~reg0 ; tx_ratem ; tx_ratem ; 0.000 ; 0.000 ; 8.000 ; +-------+---------------+---------------+--------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------+ ; Recovery: 'm707:m707|tto_shift' ; +---------+------------------+----------------+---------------------+---------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +---------+------------------+----------------+---------------------+---------------------+--------------+------------+------------+ ; -12.000 ; m707:m707|tto[3] ; m707:m707|line ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1.000 ; 0.000 ; 11.000 ; +---------+------------------+----------------+---------------------+---------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------+ ; Recovery: 'tx_ratei' ; +--------+---------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+---------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; -9.000 ; m707:m707|tto_shift ; m707:m707|out_stop[0] ; m707:m707|tto_shift ; tx_ratei ; 0.500 ; 1.500 ; 11.000 ; ; -9.000 ; m707:m707|tto_shift ; m707:m707|out_stop[1] ; m707:m707|tto_shift ; tx_ratei ; 0.500 ; 1.500 ; 11.000 ; ; -9.000 ; m707:m707|tto_shift ; m707:m707|out_stop[2] ; m707:m707|tto_shift ; tx_ratei ; 0.500 ; 1.500 ; 11.000 ; ; -8.500 ; m707:m707|tto_shift ; m707:m707|out_stop[0] ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; 1.500 ; 11.000 ; ; -8.500 ; m707:m707|tto_shift ; m707:m707|out_stop[1] ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; 1.500 ; 11.000 ; ; -8.500 ; m707:m707|tto_shift ; m707:m707|out_stop[2] ; m707:m707|tto_shift ; tx_ratei ; 1.000 ; 1.500 ; 11.000 ; +--------+---------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------+ ; Removal: 'tx_ratei' ; +-------+---------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ ; 4.500 ; m707:m707|tto_shift ; m707:m707|out_stop[0] ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; 1.500 ; 11.000 ; ; 4.500 ; m707:m707|tto_shift ; m707:m707|out_stop[1] ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; 1.500 ; 11.000 ; ; 4.500 ; m707:m707|tto_shift ; m707:m707|out_stop[2] ; m707:m707|tto_shift ; tx_ratei ; 0.000 ; 1.500 ; 11.000 ; ; 5.000 ; m707:m707|tto_shift ; m707:m707|out_stop[0] ; m707:m707|tto_shift ; tx_ratei ; -0.500 ; 1.500 ; 11.000 ; ; 5.000 ; m707:m707|tto_shift ; m707:m707|out_stop[1] ; m707:m707|tto_shift ; tx_ratei ; -0.500 ; 1.500 ; 11.000 ; ; 5.000 ; m707:m707|tto_shift ; m707:m707|out_stop[2] ; m707:m707|tto_shift ; tx_ratei ; -0.500 ; 1.500 ; 11.000 ; +-------+---------------------+-----------------------+---------------------+-------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------+ ; Removal: 'm707:m707|tto_shift' ; +-------+------------------+----------------+---------------------+---------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+------------------+----------------+---------------------+---------------------+--------------+------------+------------+ ; 8.000 ; m707:m707|tto[3] ; m707:m707|line ; m707:m707|tto_shift ; m707:m707|tto_shift ; 0.000 ; 0.000 ; 11.000 ; +-------+------------------+----------------+---------------------+---------------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------+ ; Minimum Pulse Width: 'm707:m707|tto_shift' ; +--------+--------------+----------------+------------------+---------------------+------------+----------------------------+ ; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ; +--------+--------------+----------------+------------------+---------------------+------------+----------------------------+ ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|line ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|line ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|teleprinter_flag ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|teleprinter_flag ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[10] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[10] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[11] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[11] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[3] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[3] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[4] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[4] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[5] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[5] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[6] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[6] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[7] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[7] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[8] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[8] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[9] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707:m707|tto[9] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|line|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|line|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|teleprinter_flag|[9] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|teleprinter_flag|[9] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[10]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[10]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[11]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[11]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[3]|[0] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[3]|[0] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[4]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[4]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[5]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[5]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[6]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[6]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[7]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[7]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[8]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[8]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[9]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto[9]|[1] ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto_shift|dataout ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; m707:m707|tto_shift ; Rise ; m707|tto_shift|dataout ; +--------+--------------+----------------+------------------+---------------------+------------+----------------------------+ +-----------------------------------------------------------------------------------------------------------+ ; Minimum Pulse Width: 'tx_ratei' ; +--------+--------------+----------------+------------------+----------+------------+-----------------------+ ; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ; +--------+--------------+----------------+------------------+----------+------------+-----------------------+ ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; tx_ratei ; Rise ; m707:m707|out_active ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707:m707|out_active ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; tx_ratei ; Rise ; m707:m707|out_stop[0] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707:m707|out_stop[0] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; tx_ratei ; Rise ; m707:m707|out_stop[1] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707:m707|out_stop[1] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; tx_ratei ; Rise ; m707:m707|out_stop[2] ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707:m707|out_stop[2] ; ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; tx_ratei ; Rise ; m707:m707|tto_shift ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707:m707|tto_shift ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratei ; Rise ; m707|out_active|clk ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707|out_active|clk ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratei ; Rise ; m707|out_stop[0]|clk ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707|out_stop[0]|clk ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratei ; Rise ; m707|out_stop[1]|clk ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707|out_stop[1]|clk ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratei ; Rise ; m707|out_stop[2]|clk ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707|out_stop[2]|clk ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratei ; Rise ; m707|tto_shift|clk ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratei ; Rise ; m707|tto_shift|clk ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratei ; Rise ; tx_ratei|dataout ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratei ; Rise ; tx_ratei|dataout ; +--------+--------------+----------------+------------------+----------+------------+-----------------------+ +----------------------------------------------------------------------------------------------------+ ; Minimum Pulse Width: 'rx_rate' ; +--------+--------------+----------------+------------------+---------+------------+-----------------+ ; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ; +--------+--------------+----------------+------------------+---------+------------+-----------------+ ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; rx_rate ; Rise ; tx_ratem ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; rx_rate ; Rise ; tx_ratem ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; rx_rate ; Rise ; rx_rate|dataout ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; rx_rate ; Rise ; rx_rate|dataout ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; rx_rate ; Rise ; tx_ratem|clk ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; rx_rate ; Rise ; tx_ratem|clk ; +--------+--------------+----------------+------------------+---------+------------+-----------------+ +-------------------------------------------------------------------------------------------------------+ ; Minimum Pulse Width: 'tx_ratem' ; +--------+--------------+----------------+------------------+----------+------------+-------------------+ ; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ; +--------+--------------+----------------+------------------+----------+------------+-------------------+ ; -3.500 ; 0.500 ; 4.000 ; High Pulse Width ; tx_ratem ; Rise ; tx_rateo~reg0 ; ; -3.500 ; 0.500 ; 4.000 ; Low Pulse Width ; tx_ratem ; Rise ; tx_rateo~reg0 ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratem ; Rise ; tx_ratem|dataout ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratem ; Rise ; tx_ratem|dataout ; ; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; tx_ratem ; Rise ; tx_rateo~reg0|[0] ; ; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; tx_ratem ; Rise ; tx_rateo~reg0|[0] ; +--------+--------------+----------------+------------------+----------+------------+-------------------+ +-----------------------------------------------------------------------+ ; Setup Times ; +-----------+------------+-------+-------+------------+-----------------+ ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ; +-----------+------------+-------+-------+------------+-----------------+ ; stp_mark ; tx_ratei ; 7.000 ; 7.000 ; Rise ; tx_ratei ; +-----------+------------+-------+-------+------------+-----------------+ +-------------------------------------------------------------------------+ ; Hold Times ; +-----------+------------+--------+--------+------------+-----------------+ ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ; +-----------+------------+--------+--------+------------+-----------------+ ; stp_mark ; tx_ratei ; -2.000 ; -2.000 ; Rise ; tx_ratei ; +-----------+------------+--------+--------+------------+-----------------+ +--------------------------------------------------------------------------------------+ ; Clock to Output Times ; +-----------+---------------------+--------+--------+------------+---------------------+ ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ; +-----------+---------------------+--------+--------+------------+---------------------+ ; foo ; m707:m707|tto_shift ; 17.500 ; 17.500 ; Rise ; m707:m707|tto_shift ; ; irq_l ; m707:m707|tto_shift ; 9.500 ; 9.500 ; Rise ; m707:m707|tto_shift ; ; skip_l ; m707:m707|tto_shift ; 17.500 ; 17.500 ; Rise ; m707:m707|tto_shift ; ; txdttl ; m707:m707|tto_shift ; 17.500 ; 17.500 ; Rise ; m707:m707|tto_shift ; ; stop1 ; tx_ratei ; 5.000 ; 5.000 ; Rise ; tx_ratei ; ; stop2 ; tx_ratei ; 5.000 ; 5.000 ; Rise ; tx_ratei ; ; txdttl ; tx_ratei ; 13.000 ; 13.000 ; Rise ; tx_ratei ; ; tx_rateo ; tx_ratem ; 9.500 ; 9.500 ; Rise ; tx_ratem ; +-----------+---------------------+--------+--------+------------+---------------------+ +--------------------------------------------------------------------------------------+ ; Minimum Clock to Output Times ; +-----------+---------------------+--------+--------+------------+---------------------+ ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ; +-----------+---------------------+--------+--------+------------+---------------------+ ; foo ; m707:m707|tto_shift ; 17.500 ; 17.500 ; Rise ; m707:m707|tto_shift ; ; irq_l ; m707:m707|tto_shift ; 9.500 ; 9.500 ; Rise ; m707:m707|tto_shift ; ; skip_l ; m707:m707|tto_shift ; 17.500 ; 17.500 ; Rise ; m707:m707|tto_shift ; ; txdttl ; m707:m707|tto_shift ; 17.500 ; 17.500 ; Rise ; m707:m707|tto_shift ; ; stop1 ; tx_ratei ; 5.000 ; 5.000 ; Rise ; tx_ratei ; ; stop2 ; tx_ratei ; 5.000 ; 5.000 ; Rise ; tx_ratei ; ; txdttl ; tx_ratei ; 13.000 ; 13.000 ; Rise ; tx_ratei ; ; tx_rateo ; tx_ratem ; 9.500 ; 9.500 ; Rise ; tx_ratem ; +-----------+---------------------+--------+--------+------------+---------------------+ +--------------------------------------------------------------+ ; Propagation Delay ; +------------+-------------+--------+--------+--------+--------+ ; Input Port ; Output Port ; RR ; RF ; FR ; FF ; +------------+-------------+--------+--------+--------+--------+ ; biop1 ; skip_l ; 10.000 ; ; ; 10.000 ; ; initialize ; init_l ; ; 10.000 ; 10.000 ; ; ; tx_sel ; skip_l ; 10.000 ; ; ; 10.000 ; +------------+-------------+--------+--------+--------+--------+ +--------------------------------------------------------------+ ; Minimum Propagation Delay ; +------------+-------------+--------+--------+--------+--------+ ; Input Port ; Output Port ; RR ; RF ; FR ; FF ; +------------+-------------+--------+--------+--------+--------+ ; biop1 ; skip_l ; 10.000 ; ; ; 10.000 ; ; initialize ; init_l ; ; 10.000 ; 10.000 ; ; ; tx_sel ; skip_l ; 10.000 ; ; ; 10.000 ; +------------+-------------+--------+--------+--------+--------+ +---------------------------------------------------------------------------------------+ ; Setup Transfers ; +---------------------+---------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +---------------------+---------------------+----------+----------+----------+----------+ ; m707:m707|tto_shift ; m707:m707|tto_shift ; 18 ; 0 ; 0 ; 0 ; ; rx_rate ; rx_rate ; 1 ; 0 ; 0 ; 0 ; ; tx_ratem ; rx_rate ; 1 ; 1 ; 0 ; 0 ; ; m707:m707|tto_shift ; tx_ratei ; 11 ; 1 ; 0 ; 0 ; ; tx_ratei ; tx_ratei ; 7 ; 0 ; 0 ; 0 ; ; tx_ratem ; tx_ratem ; 1 ; 0 ; 0 ; 0 ; +---------------------+---------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +---------------------------------------------------------------------------------------+ ; Hold Transfers ; +---------------------+---------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +---------------------+---------------------+----------+----------+----------+----------+ ; m707:m707|tto_shift ; m707:m707|tto_shift ; 18 ; 0 ; 0 ; 0 ; ; rx_rate ; rx_rate ; 1 ; 0 ; 0 ; 0 ; ; tx_ratem ; rx_rate ; 1 ; 1 ; 0 ; 0 ; ; m707:m707|tto_shift ; tx_ratei ; 11 ; 1 ; 0 ; 0 ; ; tx_ratei ; tx_ratei ; 7 ; 0 ; 0 ; 0 ; ; tx_ratem ; tx_ratem ; 1 ; 0 ; 0 ; 0 ; +---------------------+---------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +---------------------------------------------------------------------------------------+ ; Recovery Transfers ; +---------------------+---------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +---------------------+---------------------+----------+----------+----------+----------+ ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1 ; 0 ; 0 ; 0 ; ; m707:m707|tto_shift ; tx_ratei ; 3 ; 3 ; 0 ; 0 ; +---------------------+---------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +---------------------------------------------------------------------------------------+ ; Removal Transfers ; +---------------------+---------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +---------------------+---------------------+----------+----------+----------+----------+ ; m707:m707|tto_shift ; m707:m707|tto_shift ; 1 ; 0 ; 0 ; 0 ; ; m707:m707|tto_shift ; tx_ratei ; 3 ; 3 ; 0 ; 0 ; +---------------------+---------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. --------------- ; Report TCCS ; --------------- No dedicated SERDES Transmitter circuitry present in device or used in design --------------- ; Report RSKM ; --------------- No dedicated SERDES Receiver circuitry present in device or used in design +------------------------------------------------+ ; Unconstrained Paths ; +---------------------------------+-------+------+ ; Property ; Setup ; Hold ; +---------------------------------+-------+------+ ; Illegal Clocks ; 0 ; 0 ; ; Unconstrained Clocks ; 0 ; 0 ; ; Unconstrained Input Ports ; 14 ; 14 ; ; Unconstrained Input Port Paths ; 44 ; 44 ; ; Unconstrained Output Ports ; 8 ; 8 ; ; Unconstrained Output Port Paths ; 19 ; 19 ; +---------------------------------+-------+------+ +------------------------------------+ ; TimeQuest Timing Analyzer Messages ; +------------------------------------+ Info: ******************************************************************* Info: Running Quartus II 64-Bit TimeQuest Timing Analyzer Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition Info: Processing started: Sun Apr 07 23:14:04 2024 Info: Command: quartus_sta m707 -c m707 Info: qsta_default_script.tcl version: #1 Info (306004): Started post-fitting delay annotation Info (306005): Delay annotation completed successfully Warning (335095): TimeQuest Timing Analyzer does not support the analysis of latches as synchronous elements for the currently selected device family. Critical Warning (332012): Synopsys Design Constraints File file not found: 'm707.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" Info (332105): Deriving Clocks Info (332105): create_clock -period 1.000 -name rx_rate rx_rate Info (332105): create_clock -period 1.000 -name tx_ratem tx_ratem Info (332105): create_clock -period 1.000 -name m707:m707|tto_shift m707:m707|tto_shift Info (332105): create_clock -period 1.000 -name tx_ratei tx_ratei Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON Critical Warning (332148): Timing requirements not met Info (332146): Worst-case setup slack is -13.500 Info (332119): Slack End Point TNS Clock Info (332119): ========= ============= ===================== Info (332119): -13.500 -49.500 tx_ratei Info (332119): -9.000 -90.000 m707:m707|tto_shift Info (332119): -9.000 -9.000 tx_ratem Info (332119): -6.000 -6.000 rx_rate Info (332146): Worst-case hold slack is 1.500 Info (332119): Slack End Point TNS Clock Info (332119): ========= ============= ===================== Info (332119): 1.500 0.000 rx_rate Info (332119): 1.500 0.000 tx_ratei Info (332119): 5.000 0.000 m707:m707|tto_shift Info (332119): 5.000 0.000 tx_ratem Info (332146): Worst-case recovery slack is -12.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= ============= ===================== Info (332119): -12.000 -12.000 m707:m707|tto_shift Info (332119): -9.000 -27.000 tx_ratei Info (332146): Worst-case removal slack is 4.500 Info (332119): Slack End Point TNS Clock Info (332119): ========= ============= ===================== Info (332119): 4.500 0.000 tx_ratei Info (332119): 8.000 0.000 m707:m707|tto_shift Info (332146): Worst-case minimum pulse width slack is -3.500 Info (332119): Slack End Point TNS Clock Info (332119): ========= ============= ===================== Info (332119): -3.500 -77.000 m707:m707|tto_shift Info (332119): -3.500 -35.000 tx_ratei Info (332119): -3.500 -7.000 rx_rate Info (332119): -3.500 -7.000 tx_ratem Info (332001): The selected device family is not supported by the report_metastability command. Info (332102): Design is not fully constrained for setup requirements Info (332102): Design is not fully constrained for hold requirements Info: Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 3 warnings Info: Peak virtual memory: 4530 megabytes Info: Processing ended: Sun Apr 07 23:14:05 2024 Info: Elapsed time: 00:00:01 Info: Total CPU time (on all processors): 00:00:00