Module Debug =
Begin

Require 'bliss.req';

Forward Routine
	PrintTemp	: Novalue,
	PrintNode	: Novalue,
	PrintReg	: Novalue;

Bind
    opname = Uplit Long (AZ(
		'add','swab','div','dot',
		'sub','mod','mul','neg',
		'load_node','shift','bit','gtr',
		'leq','lss','geq','eql',
		'neq','not','eqv','and',
		'or','xor','gtru','lequ',
		'lssu','gequ','eqlu','nequ',
		'rot','max','min','carry',
		'overflow','store','error','case',
		'fparm','fstore','while','until',
		'routine','compound','incr','decr',
		'if','do-while','do-until','create',
		'exchange','select','escape','label',
		'module','plit','call','pointer',
		'bracket','exit','return','fake_cse',
		'inline','enable','signal','movp'
	)) : Vector[,Long];

Bind tntypes = uplit Long (AZ('0','reg','local','push','pref','ncse','6','7')
		) : Vector[,Long];
Bind tncodes = uplit Long (AZ('any','memory','static','any reg','spc reg',
			'dummy','declared','reg or forget')) : Vector[,Long];

Bind flonames = uplit Long (AZ('none','real','flow','both')) : Vector[,Long];
bind ptrnames = uplit Long (AZ(
		'none','0-16','0-8','e-1','e-e','8-8','?6','?7')) : Vector[,Long];

Own
	num_node,
	tbl_node	: Vector[1000,Long];

Routine FindNodes(p : Ref GT) : Novalue =
Begin
    Local
	r		: Ref GT;

    tbl_node[.num_node] = .p;
    num_node = .num_node + 1;
    Incr i From 1 To .p[gt_argc] Do
	Begin
	r = .p[gt_argv(.i-1)];
	If .r[gt_type] Eql T_NODE Then
	    FindNodes(.r)
	End
End;

Global Routine PrintAllTemps : Novalue =
Begin
    Local
	p		: Ref ITEM;

    p = .tnchain[itm_rlink];
    While .p Neqa tnchain Do
	Begin
	PrintTemp(.p[tnr_ptr]);
	p = .p[itm_rlink]
	End
End;

Global Routine PrintTree(p : Ref GT,phase) : Novalue =
Begin
    Local
	r		: Ref GT,
	i;

    If .p[gt_type] Neq T_NODE Then
	Return;
    num_node = 0;
    FindNodes(.p);
    i = 0;
    While .i Lss .num_node Do
	Begin
	PrintNode(.tbl_node[.i],.phase);
	i = .i + 1
	End;
    Print(AZ('---Tempnames---\n\n'));
    PrintAllTemps()
End;

Routine PrintQueue(q : Ref ITEM,type : Integer) : Novalue =
Begin
    Local
	r		: Ref ITEM;

    r = .q;
    While (r = .r[itm_rlink]) Neqa .q Do
	Begin
	If .type Eql T_RHO Then
	    Print(AZ('\t\t%8x => %8x %8x\n'),.r,.r[itm_data(1)],.r[itm_data(2)])
	Else If .type Eql T_CHI Then
	    Print(AZ('\t\t%8x => %8x\n'),.r,.r[itm_data(1)])
	Else
	    Begin
	    Print(AZ('\t\t%8x => %4d, %2d\n'),.r,.r[itm_abc],.r[itm_size]);
	    Incr i From 1 To .r[itm_size] Do
		Print(AZ('\t\t\t[%d] = %8x %8x\n'),
			.i,.r[itm_int_ldata(.i)],
			.r[itm_int_rdata(.i)])
	    End
	End
End;

Routine PrintArg(p : Ref GT,i : Integer) : Novalue =
Begin
    Local
	r		: Ref GT;

    r = .p[gt_argv(.i-1)];
    Selectone .r[gt_type] Of Set
	[T_LITERAL]:
	    Print(AZ('\tArg #%d = Literal %d\n'),.i,.r[gt_disp]);
	[T_SYMBOL]:
	    Begin
	    If ISSTVAR(r) Then
		Print(AZ('\tArg #%d = Symbol %8x %s [mode=%d, reg=%x]\n'),
			.i,.r,Block[.r[st_name],nt_data],
			.r[gt_mode],.r[gt_reg])
	    Else
		Print(AZ('\tArg #%d = Symbol %s\n'),.i,Block[.r[st_name],nt_data])
	    End;
	[T_NODE]:
	    Print(AZ('\tArg #%d = Node %8x\n'),.i,.r);
	[T_QUEUE]:
	    Begin
	    Print(AZ('\tArg #%d = Queue %8x\n'),.i,.r);
	    PrintQueue(.r[que_head],.r[que_code])
	    End;
	[Otherwise]:
	    Print(AZ('\tArg #%d = ? %8x\n'),.i,.r)
    Tes
End;

Global Routine PrintTnrepList(p : Ref TNREPR) : Novalue =
Begin
    Local
	R		: Ref TNREPR;

    r = .p;
    While (r = .r[itm_rlink]) Neqa .p Do
	Print(AZ('\t%8x => %8x\n'),.r,.r[tnr_ptr])
End;

Routine PrintTemp(p : Ref GT) : Novalue =
Begin
    Print(AZ('%8x = %s, %s, complex=%d, reg = %8x\n'),
		.p,.tntypes[.p[tn_code]],.tncodes[.p[tn_request]],
		.p[tn_max_complexity],
		.p[gt_reg]);
    Print(AZ('\tlon= (%2d,%2d), fon = (%2d,%2d)\n'),
		.p[tn_lon_fu],.p[tn_lon_lu],
		.p[tn_fon_fu],.p[tn_fon_lu]);
    If .p[tn_pref] Neqa 0 Then
	Begin
	Print(AZ('\tpref =\n'));
	PrintTnrepList(.p[tn_pref])
	End;
    If .p[tn_v_lit] Then
	Print(AZ('\tLiteral %9x\n'),.p[tn_literal])
    Else If .p[tn_permit] Neqa 0 Then
	Print(AZ('\tPermit = %8x\n'),.p[tn_permit]);
    If .p[tn_bind_list] Neqa 0 Then
	Print(AZ('\tBind = %8x = reg %d\n'),.p[tn_bind_list],
		(.p[tn_bind_list] - regs)/8)
End;

Routine PrintName(p : Ref ST) : Novalue =
Begin
    Print(AZ('%s'),Block[.p[st_name],nt_data]);
    If .p[st_v_namexp] Then
	Print(AZ('+%d'),
		.p[gt_disp] - .Block[.p[st_var_base],gt_disp])
End;

Routine PrintReg(p : Ref GT) : Novalue =
Begin
    Print(AZ('\tmode = %d, reg = %8x'),.p[gt_mode],.p[gt_reg]);
    If .p[gt_pos] Neq 0 Or (.p[gt_len] Neq 0 And .p[gt_len] Neq 16) Then
	Print(AZ(', pos = (%d,%d)'),.p[gt_pos],.p[gt_len]);
    If .p[gt_v_symoff] And .p[gt_disp] Neqa 0 Then
	Begin
	Print(AZ(', symb = '));
	PrintName(.p[gt_disp])
	End
    Else If .p[gt_disp_16] Neq 0 Then
	Print(AZ(', disp = %d'),.p[gt_disp_16]);
    Print(AZ('\n'))
End;

Macro PrintBit(n) =
		If .p[%Name(gt_v_,n)] Then
		    Print(AZ(%String(' ',n))) %,
	PrintBit2(s) =
		If .p[%Name(rw_,s)] Then
		    Print(AZ(%String(' ',s))) %,
	PrintRC(s) =
		If .p[%Name(rc_,s)] Then
		    Print(AZ(%String(' ',s))) %;

Routine PrintNode(p : Ref GT,phase) : Novalue =
Begin
    Local
	n;

    Print(AZ('%8x %s occ=%d'),.p,.opname[.p[gt_code]],.p[gt_occ]);
    If .phase Gtr 1 Then
	Print(AZ('\tlon = %d, fon = %d'),.p[gt_lon],.p[gt_fon]);
    If .p[gt_csparent] Neqa .p Then
	Print(AZ(' csp=%8x'),.p[gt_csparent]);
    If .p[gt_csthread] Neqa 0 Then
	Print(AZ(' cst=%8x'),.p[gt_csthread]);
    If .phase Eql 0 Then
	Begin
	If .p[gt_fparent] Neq .p Then
	    Print(AZ(' fp=%8x'),.p[gt_fparent]);
	If .p[gt_fsthread] Neq 0 Then
	    Print(AZ(' thr=%8x'),.p[gt_fsthread])
	End;
    Print(AZ('\n'));
    If .phase Neq 0 Then
	PrintReg(.p);
    If .phase Eql 0 Then
	Print(AZ('\tmklevel=%d, crlevel=%d\n'),.p[gt_mklevel],.p[gt_crlevel]);
    Print(AZ('\t:'));
    PrintBit(mustgencode);
    PrintBit(dont_unlink);
    PrintBit(csp);
    PrintBit(bogus);
    PrintBit(fp);
    If .phase Eql 0 Then
	Begin
	PrintBit(purge);
	PrintBit(jm);
	PrintBit(rm);
	PrintBit(mm);
	PrintBit(prolog);
	PrintBit(postlog);
	PrintBit(alpha);
	PrintBit(omega);
	PrintBit(rho);
	PrintBit(chi)
	End;
    PrintBit(flow);
    PrintBit(bound);
    PrintBit(delayed);
    PrintBit(copied);
    PrintBit(coded);
    PrintBit(add_copied);
    PrintBit(chpdfr);
    PrintBit(ctl_or_cse);
    PrintBit(tpath);
    PrintBit(symresult);
    Print(AZ('\n'));
    If .phase Neq 0 Then
	Begin
	N = .p[gt_state];
	Print(AZ('\t: %s %s'),
		.flonames[.p[rw_real_flow]],
		.ptrnames[.p[rw_ptr_state]]);
	PrintBit2(literal);
	PrintBit2(negated);
	PrintBit2(complemented);
	PrintBit2(destroyable);
	PrintBit2(immediate);
	Print(AZ('\n'))
	End;
    If .p[RCBITS] Neq 0 Then
	Begin
	Print(AZ('\tcode:'));
	PrintRc(mov_offset);
	PrintRc(mov_target);
	PrintRc(negate);
	PrintRc(complement);
	PrintRc(add_offset);
	PrintRc(sub_offset);
	PrintRc(operate);
	PrintBit(old_rcmt);
	Print(AZ('\n'))
	End;
    incr I From 1 To .p[gt_argc] Do
	PrintArg(.p,.i);
    Print(AZ('\n'))
End;

End
Eludom