.TITLE GATSYN Serial Line Driver .NLIST BEX .ENABL LC ; ; PDP11/DCN Operating System - Serial Line Driver ; ; This module is an extension of the net driver processes. it transmits and ; receives packets using the DL11/DLV11, DU11/DUV11, DUP11 and DPV11 Serial ; Line Units and an envelope similar to the IBM Binary Synchronous ; Communications (BSC) protocol, except that no CRC error checking is used. ; ; Option bits: ; 000007 SYN count (1-7 default 4) ; ; Protocol functions: ; DLE-STX 020-002 beginning of text ; DLE-ETX 020-003 end of text ; DLE-DLE 020-020 transparent dle ; DLE-SYN+040 020-066 transparent syn ; DLE-ETX+040 020-043 transparent etx (even parity) ; DLE-ETX+240 020-243 transparent etx (odd parity) ; ; Note: Due the sensitivity of certain hardware to syn and etx, these codes ; are mapped before transmission and preceded by the dle code. The syn code is ; discarded on reception, either by the hardware or software. ; ; Conditional assembly switches ; .IIF NDF,CS.DEV CS.DEV == 0 ;0: du11/duv11, 1: dup11, 2: dpv11 ; Note: the dlv11 will operate with any of the switch selections ; ; External symbols ; .GLOBL .WAIT,.SKED,.STIM,NETINP,NETOUT ; ; Entry symbols ; .GLOBL DUIPAT,DUOPAT ; ; System definitions ; .ASECT .MCALL .COM,.CHR,.PSA,.GAT,.PAT ;dcnlib definitions .MCALL .SETV,.CTIM ;dcnlib macros .COM ;define common data .CHR ;define ascii code .PSA ;define process storage areas .GAT ;define gateway/bridge storage areas ; ; Module definitions ; INTENB = 000100 ;interrupt enable (inpcsr/outcsr) ACT = 000020 ;active bit (inpcsr/outcsr) TSOM = 000400 ;transmit som (outcsr) TEOM = 001000 ;transmit eom (outcsr) .IF EQ,CS.DEV-0 ;conditional assembly for duv11 INICSR = 036000 ;initial inpcsr .ENDC .IF EQ,CS.DEV-1 ;conditional assembly for dup11 INICSR = 101000 ;initial inpcsr .ENDC .IF EQ,CS.DEV-2 ;conditional assembly for dpv11 INICSR = 043400 ;initial inpcsr .ENDC ; ; Process save area extension (asr) ; . = GATENR ASRSTA: .BLKW 1 ;input state ASRADR: .BLKW 1 ;buffer pointer ASRERR: .BLKW 1 ;error bits ASRCNT: .BLKW 1 ;byte count .BLKW REGEND/2+NTISTK ;process stack ASREND = . ;end of asr extension ; ; Process save area extension (asx) ; . = GATENX ASXSTA: .BLKW 1 ;output state ASXADR: .BLKW 1 ;buffer pointer ASXERR: .BLKW 1 ;error bits ASXSYN: .BLKW 1 ;syn count .BLKW REGEND/2+NTOSTK ;process stack ASXEND = . ;end of asx extension ; ; Device register block (dev) ; . = 0 INPCSR: .BLKW 1 ;input status register INPBUF: .BLKW 1 ;input buffer/parameter register OUTCSR: .BLKW 1 ;output status register OUTBUF: .BLKW 1 ;output buffer register .PAGE ; ; Procedure segment ; ; Supervisor-state procedure ; dsects: r2 = dev, r3 = par, r4 = reg, r5 = psa ; ; Note: Calling process sets R0 = byte count, R1 = starting address. ; at completion of transfer R0 = residual byte count, R1 = ending ; address. Record UART/USRT errors as input/output errors. ; .PSECT $KERI,RO,I ; ; Initialize ; NTOINI: ADD #4,R0 ;allocate output vector BR NTI10 ; NTIINI: MOV #INTENB+6,INPCSR(R2) ;raise trm rdy and req snd MOV #INICSR+SYN,INPBUF(R2) ;initialize mode, length, syn code CLR OUTCSR(R2) ;reset output control bits NTI10: MOV #INT+EXTBAS,R1 ;allocate input vector .SETV NTORST: RTS PC ; ; Start block transfer input ; NTISIO: MOV R0,ASRCNT(R5) ;save pointers BIS #ACT,INPCSR(R2) ;enable receiver JMP .WAIT ; ; Device interrupt input ; NTIINT: MOV INPBUF(R2),R0 ;get byte/control bits BPL 1$ ;branch if no error INC ASRERR(R5) ;count input errors 1$: CMPB R0,#SYN ;is this syn BEQ NTIRTN ;branch to delete if yes ADD ASRSTA(R5),PC ;bannister BR NTIS0 ;0 look for dle BR NTIS1 ;1 dle found. look for stx BR NTIS2 ;2 stx found. gobble text BR NTIS3 ;3 dle in text. test next byte ; NTIS0: CMPB R0,#DLE ;state 0. is this dle BEQ NTIINC ;branch if yes INC ASRERR(R5) ;no. count input errors NTIRSX: CLR ASRSTA(R5) ;exit to state 0 BIC #ACT,INPCSR(R2) ;flap search-sync bit BIS #ACT,INPCSR(R2) NTIRTN: RTS PC ; NTIS1: CMPB R0,#STX ;state 1. is this stx BEQ NTIREC ;branch if yes INC PARVIO(R3) ;no. tally protocol error BR NTIRSX ; NTIREC: TST ASRERR(R5) ;check for errors BEQ 2$ ;branch if none CLR ASRERR(R5) INC PARPAM(R3) ;tally preamble error 2$: TSTB PSASTS(R5) ;is process running BPL 1$ ;branch if no INC PARBZY(R3) ;yes. tally no buffer BR NTIRSX ; 1$: CLR @R4 ;reset pointers MOV REGR1(R4),ASRADR(R5) MOV #4,ASRSTA(R5) ;exit to state 2 RTS PC ; NTIS2: CMPB R0,#DLE ;state 2. is this dle BNE NTITXT ;branch if no NTIINC: ADD #2,ASRSTA(R5) ;yes. bump state RTS PC ; NTIS3: CMPB R0,#ETX ;state 3. is this etx BEQ NTIEND ;branch if yes CMPB R0,#STX ;no. is this stx BNE 1$ ;branch if no INC PARVIO(R3) ;yes. indicate protocol error BR NTIREC ; 1$: SUB #2,ASRSTA(R5) ;exit to previous state BICB #40,R0 ;unmap byte NTITXT: CMP @R4,ASRCNT(R5) ;is buffer full BHIS 1$ ;branch if yes MOVB R0,@ASRADR(R5) ;no. store byte in buffer INC ASRADR(R5) ;update pointers INC @R4 1$: RTS PC ; NTIEND: TST ASRERR(R5) ;check for errors BEQ 1$ ;branch if none CLR ASRERR(R5) BIS #1,REGPS(R4) ;indicate input error INC PARIOV(R3) ;tally receive error 1$: JSR PC,NTIRSX ;reset for next frame JMP .SKED ; ; Start block transfer output ; NTOSIO: MOV R1,ASXADR(R5) ;Save buffer pointer MOV PAROPT(R3),R0 ;extract syn count BIC #^C7,R0 BNE 1$ MOV #4,R0 ;(default 4) 1$: MOV R0,ASXSYN(R5) JSR PC,.WAIT ;enter wait state BIS #ACT+INTENB,OUTCSR(R2) ;start transmitter MOV #TSOM+SYN,OUTBUF(R2) ;send first syn CLR ASXERR(R5) MOV PARTRY(R3),R0 ;start output timeout ASL R0 ;(2x base) SUB R0,RESTIM(R5) JMP .STIM ; ; Device interrupt output ; NTOINT: BIS OUTBUF(R2),ASXERR(R5) ;save error bits ADD ASXSTA(R5),PC ;bannister BR NTOS0 ;0 syn sent. send another or dle BR NTOS1 ;1 dle sent. send stx BR NTOS2 ;2 stx sent. send text BR NTOS3 ;3 dle in text. send second dle BR NTOS4 ;4 syn/etx in text. send mapped byte BR NTOS5 ;5 dle end of packet. send etx BR NTOS6 ;6 etx sent. close down ; NTOS0: DEC ASXSYN(R5) ;state 0. is syn sequence complete BEQ 1$ ;branch if yes MOV #SYN,OUTBUF(R2) ;no. send syn RTS PC ; 1$: MOV #DLE,OUTBUF(R2) ;syn sequence complete. send dle BR NTOINC ; NTOS1: MOV #STX,OUTBUF(R2) ;state 1. send stx BR NTOINC ; NTOS2: TST @R4 ;state 2. is buffer empty BNE 1$ ;branch if no MOV #DLE,OUTBUF(R2) ;yes. send dle ADD #6,ASXSTA(R5) ;exit to state 5 RTS PC ; 1$: CLR R0 ;fetch byte BISB @ASXADR(R5),R0 CMPB R0,#DLE ;is this dle BEQ 3$ ;branch if yes CMPB R0,#SYN ;no. is this mappable byte BEQ 2$ ;branch if yes CMPB R0,#ETX BEQ 2$ ;branch if yes CMPB R0,#ETX+200 BNE NTOTXT ;branch if no 2$: ADD #2,ASXSTA(R5) ;exit to state 4 3$: MOV #DLE,OUTBUF(R2) ;yes. send dle NTOINC: ADD #2,ASXSTA(R5) ;bump state RTS PC ; NTOS3: CLR R0 ;state 3. send byte BR NTOMAP ; NTOS4: MOV #040,R0 ;state 4. send mapped byte NTOMAP: BISB @ASXADR(R5),R0 MOV #4,ASXSTA(R5) ;exit to state 2 NTOTXT: MOV R0,OUTBUF(R2) INC ASXADR(R5) ;update pointers DEC @R4 RTS PC ; NTOS5: MOV #ETX,OUTBUF(R2) ;state 5. send etx BR NTOINC ;exit to state 6 ; NTOS6: .CTIM ;state 6. clear output timeout ADD R0,RESTIM(R5) TST ASXERR(R5) ;did errors occur BPL NTOEND ;branch if no INC PAROOV(R3) ;yes. indicate transmit error NTOASY: BIS #1,REGPS(R4) ;indicate output error NTOEND: BIC #ACT+INTENB,OUTCSR(R2) ;stop transmitter CLR ASXSTA(R5) ;exit to state 0 JMP .SKED ; ; Data segment ; .PSECT $KERD,RO,D ; ; Process headers ; DUIPAT: .PAT ASREND,NETINP,PRI4,<0,0,NTIINI,NTISIO,NTIINT> DUOPAT: .PAT ASXEND,NETOUT,PRI3,<0,NTOASY,NTOINI,NTOSIO,NTOINT,NTORST> ; .END