Received: from aerospace.aero.org (TCP 3200400101) by MC.LCS.MIT.EDU 16 May 89 10:56:05 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA04085; Tue, 16 May 89 07:51:51 -0700 Posted-Date: Tue, 16 May 89 07:51:49 -0700 Message-Id: <8905161451.AA04085@aerospace.aero.org> To: Johnny Billquist Cc: PDP8-LOVERS@MC.LCS.MIT.EDU, wally Subject: Re: MACREL for OS/8... In-Reply-To: Your message of "16 May 89 14:13:53 N." <12494462774.13.1113.13440@KICKI.STACKEN.KTH.SE> Date: Tue, 16 May 89 07:51:49 -0700 From: wally@aerospace.aero.org I have MACREL.SV Vers 2A. Also, I have sources but am not sure of the version. The .SV which came from DEC had copyright '77,'78,'79 and one of the modules had 1977 inside and version=ptchlev which I couldn't quickly find. I believe that my version of RTS/8 is the latest as I bought it when DEC was just about done with /8 things. As I recall, I have some MACREL things from the U of M which consisted of many MACROS and support for the FPP. I'll be happy to try to scrape all of it togeather and send it to you. I hope you have an RX01. I do mostly FORTRAN IV (the system midified by Steve Besch), generally use the TECO editor, RK05, FPP8A, SILICON or RAM disk (25 times faster than RK05), am wire-wrapping a I/O board like the KL8E but with type ahead and other features, have ZETA8 plotter interactive screen graphics 3D ... . Wally Kalinowski 213 336 6940 work 515 1544 home PS looking for ETOS and OMNI +  Received: from aerospace.aero.org (TCP 3200400101) by MC.LCS.MIT.EDU 16 May 89 11:03:40 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA04296; Tue, 16 May 89 08:00:38 -0700 Posted-Date: Tue, 16 May 89 08:00:35 -0700 Message-Id: <8905161500.AA04296@aerospace.aero.org> To: Johnny Billquist Cc: PDP8-LOVERS@MC.LCS.MIT.EDU, wally Subject: Re: MACREL for OS/8... In-Reply-To: Your message of "16 May 89 14:13:53 N." <12494462774.13.1113.13440@KICKI.STACKEN.KTH.SE> Date: Tue, 16 May 89 08:00:35 -0700 From: wally@aerospace.aero.org Correction: I generally use the VISTA editor, could hardly continue existance on this planet if forced to use TECO all the time. Also, do you have dwgs. for thr FPP8A?  Received: from KICKI.STACKEN.KTH.SE (TCP 20273365334) by MC.LCS.MIT.EDU 16 May 89 08:15:05 EDT Return-Path: Date: 16-May-89 14:13:53 +0200 From: Johnny Billquist To: PDP8-LOVERS@MC.LCS.MIT.EDU Subject: MACREL for OS/8... Message-ID: <12494462774.13.1113.13440@KICKI.STACKEN.KTH.SE> Does anybody have MACREL V2 for OS/8? I have V1B, but would very much like to get my hands onto V2. Also if anybode have RTS-8 V3, it would be nice... If anybody is interested in TECO V7 for OS/8, I have it, and can send you a copy. To compile it, you will need MACREL V2. The distribution comes from DECUS, and includes both sources and binarys. /Johnny --------  Received: from AI.AI.MIT.EDU (CHAOS 3130) by MC.LCS.MIT.EDU 16 May 89 14:46:04 EDT Date: Tue, 16 May 89 14:52:35 EDT From: "Christopher R. Zach" Subject: MACREL for OS/8... To: wally@AEROSPACE.AERO.ORG cc: BQT@KICKI.STACKEN.KTH.SE, PDP8-LOVERS@MC.LCS.MIT.EDU In-reply-to: Msg of Tue 16 May 89 08:00:35 -0700 from wally at aerospace.aero.org Message-ID: <595892.890516.CZ@AI.AI.MIT.EDU> Johnny: I have drawings for the Fpp12 and I think I have the fpp-8 doc kit for Posibus (8/I, 8, 8/S, 8/L) Pdp-8's. Would this help? CZ  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 20 May 89 03:22:13 EDT Received: from AEROSPACE.AERO.ORG by mintaka.lcs.mit.edu id aa14062; 17 May 89 19:01 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA12831; Wed, 17 May 89 15:59:47 -0700 Posted-Date: Wed, 17 May 89 15:59:45 -0700 Message-Id: <8905172259.AA12831@aerospace.aero.org> To: Johnny Billquist Cc: "Christopher R. Zach" , wally@aerospace.aero.org, PDP8-LOVERS@mc.lcs.mit.edu, wally@lcs.mit.edu Subject: Re: MACREL for OS/8... In-Reply-To: Your message of "17 May 89 20:22:26 N." <12494792009.15.1113.99900@KICKI.STACKEN.KTH.SE> Date: Wed, 17 May 89 15:59:45 -0700 From: wally@aerospace.aero.org I'll try to get some things togeather and mail them this weekend. I tried my KERMIT but it didn't work. It used to work. I must have a faulty copy and will try to fix it but; no time today. 9600 baud: As you guessed, upper right chip on the M8650 KL8E Pin 8 4800 next pin up: Pin 9 9600 remove any jumper from group G (upper right). Note the upper row all tied togeather 1, 3, 5, 7, 9 For 300 baud 6 goes to upper row for 1200 2 goes to upper row 9600 Pin 9 goes to upper row I have a program CCF (copy coded file) that will compress text. Steve Besch's FORTRAN has Boolean functions and open-close files. You mentioned importance of asynchronous I/O - My "KL8E" style buffered input board should take care of it. It is presently in the wire wrap proto-type stage. Will send some job info in package which I will mail to you within the next few days. (I'll pay as it should only cost a few dollars and as you know, we people lucky enough to live in the U.S.A. are all very rich. So, give me a few days to get KERMIT going and I'll send a few things in the mail and also give me a few days to stuff somethings you asked for in a box. Wally  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 20 May 89 03:17:12 EDT Received: from [130.237.234.220] by mintaka.lcs.mit.edu id aa11375; 17 May 89 14:23 EDT Return-Path: References: Message from "Christopher R. Zach" of 16-May-89 23:26:03 In-reply-to: <595892.890516.CZ@AI.AI.MIT.EDU> Date: 17-May-89 20:22:26 +0200 From: Johnny Billquist To: "Christopher R. Zach" , wally@aerospace.aero.org cc: BQT@kicki.stacken.kth.se, PDP8-LOVERS@mc.lcs.mit.edu Subject: Re: MACREL for OS/8... Message-ID: <12494792009.15.1113.99900@KICKI.STACKEN.KTH.SE> Sorry, but I already have the drawings on the FPP8A, and doesn't even have a FPP. Thanks anyway... /Johnny --------  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 19 May 89 09:17:25 EDT Received: from venera.isi.edu by mintaka.lcs.mit.edu id aa28797; 19 May 89 9:04 EDT Posted-Date: Fri, 19 May 89 05:04:17 PST Message-Id: <8905191304.AA20288@venera.isi.edu> Received: from LOCALHOST by venera.isi.edu (5.61/5.51) id ; Fri, 19 May 89 06:04:19 -0700 To: pdp8-lovers@mc.lcs.mit.edu Cc: fucich@venera.isi.edu Subject: PDP8/E with CACHE Date: Fri, 19 May 89 05:04:17 PST From: fucich@venera.isi.edu A PDP-8 with cache was designed and constructed by Professor David Casasent at Carnegie-Mellon University. This has a performance factor of 5 in comparison to the PDP8/E without cache. There is an article in Computer Design, pp. 83-89 Nov. 1971. Anyone have more info?  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 19 May 89 17:49:09 EDT Received: from AEROSPACE.AERO.ORG by mintaka.lcs.mit.edu id aa07240; 19 May 89 9:49 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA20079; Fri, 19 May 89 06:47:46 -0700 Posted-Date: Fri, 19 May 89 06:47:44 -0700 Message-Id: <8905191347.AA20079@aerospace.aero.org> To: Johnny Billquist Cc: "Christopher R. Zach" , wally@aerospace.aero.org, PDP8-LOVERS@mc.lcs.mit.edu, wally@lcs.mit.edu Subject: Re: MACREL for OS/8... In-Reply-To: Your message of "17 May 89 20:22:26 N." <12494792009.15.1113.99900@KICKI.STACKEN.KTH.SE> Date: Fri, 19 May 89 06:47:44 -0700 From: wally@aerospace.aero.org A summary of CCLX's features visavis CCL's. Most are assembly time options, those that are not are marked permanent. 1) '.ZERO SYS:' or 'ZERO DSK:' are not allowed. 2) If the system date is bad, a correct one is requested and must be entered before a command line is processed. 3) '.RECALL' displays the contents of all remembrance areas. '.RECALL NAME' displays the contents of the remembrance area used by the NAME command. 4) CCLX does not forget remembrances when the date changes (permanent). 5) '.COMMANDS' displays all CCLX command keywords. 6) '.EJECT' sends a form feed and carriage return to device 66 (the standard lineprinter device number). 7) As documented, but not always done, in CCL, '.EDIT' remembers only up to the backarrow (permanent). 8) '.TOMMOROW' and '.YESTERDAY' increment and decrement the date. 9) '.TIDY' deletes all .TM and .WS files on the indicated device. 10) '.DEFINE NAME' adds a command 'NAME' which, when invoked, does a command decode iSV. 26) One letter is sufficient to specify several comon commands. 27) '.SQUISH' sets /O (does not ask "ARE YOU SURE?"). 28) '.FLIST' calls revised FLIST.SV. 29) '.FORMAT' calls ACID.SV or RUNOFF.SV depending on the input file extension. A '-NO' switch analogous to the '-NB' switch is allowed. 30) The remembrance code now allows up to fifteen areas of (assembly-time) variable size (permanent). 31) '-R' switch causes CCLX to not store the containing command line in its remembrance area. 32) '.PIP' calls PIP.SV. 33) '.FIX NAME /X' adds /X to the default switch options set every time '.NAME' is invoked. Backslashes similarly unset switches. Several switches can be fixed at a time, and several commands. 34) '.BOOT XX' (with space instead of slash as separator) inserts /. 35) '.FILL MYFILE.TX[139]' adds a file 139(10) blocks long to the directory of the specified device with PIP (no more than 255 blocks). 36) '.DUP RXA1:' without an output device forces /R (verify) option. 37) '.DSK DEVICE' calls DIRECT.SV exactly like '.DIRECT', but does not use a remembrance area. Consequently, '.DSK' defaults to DSK:, not the remembrance. / /Version 05.03 SECT8 IAND JA START ENTRY IOR ENTRY IXOR /TRAP3 RETURN RETRN=.+1 EXTERN #RETRN ADDR #RETRN /FIRST OPERAND FOR AND, OR, XOR /(SECOND IN FLAC) A, ORG .+3 / / PROGRAM TO TEST IAND / / I=262155 / J=262154+131072+65536+32768+16384+8192+4096+2048+1024+ / $ 512+256+128+64+32+16+8+4+2+1 / J=262154 / K=IAND(I,J) / WRITE(0,400) K /400 FORMAT(' K=',D15.8) ! NOT ENOUGH PRECICION WITH 'I' FORMAT / STOP / END / /IOR8, IAND8, IXOR8 /ASSUME FLAC AND A CONTAIN FIXED INTEGERS /(RESULTING FROM ALN 0) /FORM BITWISE OR, AND, OR XOR OF A AND FLAC, /RESULT TO FLAC. IAND8, CDF 0 TAD A+1 AND% FLACHI DCA% FLACHI TAD A+2 AND% FLACLO DCA% FLACLO EXIT, CIF CDF 0 JMP% RETRN IOR8, CDF 0 TAD A+1 CMA DCA A+1 TAD A+2 CMA DCA A+2 TAD% FLACHI CMA AND A+1 CMA DCA% FLACHI TAD% FLACLO CMA AND A+2 CMA DCA% FLACLO JMP EXIT IXOR8, CDF 0 TAD A+1 DCA XARG1 TAD% FLACHI JMS XOR DCA% FLACHI TAD A+2 DCA XARG1 TAD% FLACLO JMS XOR DCA% FLACLO JMP EXIT /FORM EXCLUSIVE OR OF XARG AND AC XOR, 0 /ASSUME XARG1=0011 BINARY, DCA XARG2 /AND XARG2=0101. AC CONTENTS: TAD XARG1 /0011 CMA /1100 AND XARG2 /0100 CMA /1011 DCA XTEMP TAD XARG2 /0101 CMA /1010 AND XARG1 /0010 CMA /1101 AND XTEMP /1001 CMA /0110 JMP% XOR XARG1, 0 XARG2, 0 XTEMP, 0 /FLOATING AC LOCATIONS FLACEX, 44 FLACHI, 45 FLACLO, 46 /INDEX REGISTERS XR, 0 XR1, 0 /BASE PAGE ARGP, ORG .+3 ARG1, ORG .+3 ARG2, ORG .+3 BASE 0 SETUP, JA . STARTD FLDA 30 FSTA RETURN FLDA 0 SETX XR SETB ARGP BASE ARGP FSTA ARGP LDX 0,1 FLDA% ARGP,1+ FSTA ARG1 STARTF JA SETUP /GET 2 ARGS AND PUT IN A, FLAC SETUP2, JA . JSA SETUP STARTD FLDA% ARGP,1+ FSTA ARG2 STARTF FLDA% ARG1 ALN 0 FSTA# A FLDA% ARG2 ALN 0 JA SETUP2 NORMX, FNORM RETURN, JA . RETX, XTA 1 JA RETURN START, JSA SETUP2 TRAP3 IAND8 JA NORMX IOR, JSA SETUP2 TRAP3 IOR8 JA NORMX IXOR, JSA SETUP2 TRAP3 IXOR8 JA NORMX Wally  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 19 May 89 17:49:37 EDT Received: from AEROSPACE.AERO.ORG by mintaka.lcs.mit.edu id aa00478; 19 May 89 10:38 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA01053; Fri, 19 May 89 07:37:13 -0700 Posted-Date: Fri, 19 May 89 07:37:11 -0700 Message-Id: <8905191437.AA01053@aerospace.aero.org> To: Johnny Billquist Cc: "Christopher R. Zach" , wally@aerospace.aero.org, PDP8-LOVERS@mc.lcs.mit.edu, wally@lcs.mit.edu Subject: Re: FORTRAN IV In-Reply-To: Your message of "17 May 89 20:22:26 N." <12494792009.15.1113.99900@KICKI.STACKEN.KTH.SE> Date: Fri, 19 May 89 07:37:11 -0700 From: wally@aerospace.aero.org /ABS. location access routines. /Version 01.06 /NOTE: In the following descriptions, L is an absolute core location, / is the contents of L, X is any FORTRAN argument for which /the absolute address is desired, I is any integer, and V is any /floating point variable. ENTRY LOC /L=LOC(X): Return abs. core location of (X) ENTRY LOCX /L=LOCX(X): Return address of EXTERNAL X ENTRY IPGET /I=IPGET(L): Return as 12 bit unsigned integer / ENTRY INGET /I=INGET(L): Return as 12 bit signed integer ENTRY IFLAG /I=IFLAG(L): Return as IPGET, then zero ENTRY IDPGET /I=IDPGET(L): Return as 24 bit signed DP word / ENTRY IGET2 /I=IGET2(L): Return as 24 bit signed integer ENTRY GET3 /V=GET3(L): Return as 36 bit floating ENTRY PUT1 /CALL PUT1(L,I): Store I as 12 bit ENTRY PUT2 /CALL PUT2(L,I): Store I as 24 bit ENTRY PUT3 /CALL PUT3(L,I): Store V as 36 bit /Note, that in PUT1, the largest "I" should be in the range 0 /and store it in ARG 1. Then we may proceed the same as /for LOC. LOCX, JSA SETUP /Set up arguments FLDA% ARG1 /Load the address FSTA ARG1 /Store it JA LOCX2 /back to function like LOC /Here to get the 12 bit word at the address specified by ARG1. /First, set our index registers so that the word is at XR0 IPGET, JSA PUTGET /Set up XR's XTA 0 /Load the signed word IPG2, JGE #GOBAK /Positive, do nothing FADD TENK /Else add 10000 base 8 JA #GOBAK /which unsigns the number /Same as IPGET, but we zero the word before leaving. /There is a small risk of an interrupt race, but for now /we'll leave it. IFLAG, JSA PUTGET /Set up XR's XTA 0 /Load the word LDX 0,0 /Zero it JA IPG2 /Merge with IPGET /Same as IGET2, except that FACLO is swapped with FACHI to /accomodate standard D.P. words which have LOW;HI format. IDPGET, JSA PUTGET STARTD /Set D mode XTA 0 /Get High order word FSTA INTEGR /Store in XR1 XTA 1 /Get Low order word SETX #XR /Reset XR's IGXX, ATX 0 /Store HIGH JA LINTX /Go load and NORM integer /Define a new SECT since the previous page is almost full. /This allows the loader to make optimal use of memory. SECT IGET2 JSA PUTGET /Get ARG1 set to address STARTD FLDA% ARG1,0 /Load 2 low order words JA SINTX /Go float the answer PUT1, JSA PUTGET FLDA% ARG2 /Load value ATX 0 /Store it JA #GOBAK PUT2, JSA PUTGET FLDA% ARG2 /Get arg 2 ALN 0 /Fix it STARTD /Set D.P. mode FSTA% ARG1 /Store at address STARTF /Reset F mode and JA #GOBAK /Exit GET3, JSA PUTGET /Set up arg1 FLDA% ARG1 /Load three words JA #GOBAK /And return with them PUT3, JSA PUTGET FLDA% ARG2 /Load variable FSTA% ARG1 /Store it JA #GOBAK /And return /If no FPP, replace LEA% ARG1,0 with JSA #LEA, and install the /following: /#LEA, 0;0 / STARTD / FLDA% ARG1 / ALN 2 /Save only upper bits / ALN 3 /Reverse alignment / FNEG / FADD% ARG1 /Subtract upper bits / JA #LEA /return I don't know exactly what you wanted to do with 'AND' and 'OR' type things in the FORTRAN for. But I sent them. It occurs that the above routine could be equally valuable for such things so I send it as well. This weekend I'll get things togeather and mail floppies to you. The RALF routines I've sent may not work with your FRTS.SV because STEVE BESCH'S version may have moved things around from what you have. Anyway, I'll get the whole FORTRAN package to you by mail. I talked to 2 others about your operating system. We all feel that It's not a good idea to attempt the monster task. There are many other, more valuable things, to be done.  Received: from AI.AI.MIT.EDU (CHAOS 3130) by MC.LCS.MIT.EDU 19 May 89 21:08:14 EDT Date: Fri, 19 May 89 21:05:49 EDT From: "Robert E. Seastrom" Subject: PDP8/E with CACHE To: fucich@VENERA.ISI.EDU cc: pdp8-lovers@MC.LCS.MIT.EDU In-reply-to: Msg of Fri 19 May 89 05:04:17 PST from fucich at venera.isi.edu Message-ID: <597725.890519.RS@AI.AI.MIT.EDU> There is some information on this, as well as a good amount of information on the PDP-8 architecture in general in _Computer Engineering: A DEC view of hardware design_. (copyright 1978, Digital Press). All in all a fantastic book; everyone on this list ought to buy one. ---Rob  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 21 May 89 15:59:56 EDT Received: from [130.237.234.220] by mintaka.lcs.mit.edu id aa00230; 20 May 89 13:36 EDT Return-Path: Date: 20-May-89 14:44:03 +0200 From: Johnny Billquist To: PDP8-LOVERS@mc.lcs.mit.edu Subject: Omnibus flipchips... Message-ID: <12495516840.20.1113.26040@KICKI.STACKEN.KTH.SE> I compiled a list of all (to me known) flipchips for the omnibus, which I thought might be of interest to some of you... Additions are welcome... H220 MP8-E MEMORY PARITY (MEMORY STACK) G227 (MEMORY X-Y DRIVER) G105 (SENSE INHIBIT) G649 MM8-AA MODULE ASSEMBLY H219-A MM8-AA 8K STACK ASSEMBLY G650 MM8-AB MODULE ASSEMBLY H219-B MM8-AB 16K STACK ASSEMBLY M837 KM8-E MEMORY EXTENSION AND TIME-SHARE M839 DP8-E SYNCHRONOUS MODEM M840 PC8-E HIGH-SPEED PAPER-TAPE READER/PUNCH M841 LE8-E LINE PRINTER CONTROL M842 XY8-E PLOTTER CONTROL M843 CM8-E/CR8-E CARD READER M847 MI8-E HARDWARE BOOTSTRAP LOADER M848 KP8-E POWER-FAIL AND AUTO-RESTART M863 DR8-E 12 CHANNEL I/O M866 DP8-E SYNCHRONOUS MODEM M868 TD8-E DECTAPE CONTROL M880 MR8-E READ-ONLY MEMORY H241 (BRAID BOARD) M882 DK8-EA REAL-TIME CLOCK M883 DK8-EC REAL-TIME CLOCK M884 KG8-E PARITY CHECK GENERATOR/DETECTOR M930 RK05 BUS TERMINATOR CARD M7104 RK8-E DISK DRIVE CONTROLLER (DATA BUFFER REGISTER AND STATUS MODULE) M7105 RK8-E DISK DRIVE CONTROLLER (MAJOR REGISTERS MODULE) M7106 RK8-E DISK DRIVE CONTROLLER (CONTROL MODULE) M8300 KK8-E CPU (E) (CP MAJOR REGISTERS) M8310 KK8-E CPU (E) (CP MAJOR REGISTERS CONTROL) M8311 MS8-A READ/WRITE RANDOM ACCESS MEMORY (1,2,4K) M8312 MR8-A READ-ONLY RANDOM ACCESS MEMORY (1,2,4K) M8315 KK8-A CPU (A) M8316 DKC8-AA I/O OPTION BOARD M8317 KM8-A EXTENDED OPTION BOARD M8321 TM8-E DECMAGTAPE CONTROL (OUTPUT CONTROL MODULE) M8322 TM8-E DECMAGTAPE CONTROL (CONTROL AND DATA BREAK MODULE) M8323 TM8-E DECMAGTAPE CONTROL (TRANSPORT STATUS AND CONTROL MODULE) M8326 DB8-E INTERPROCESSOR BUFFER M8327 TM8-E DECMAGTAPE CONTROL (REGISTERS MODULE) M8329 LC8-E DECWRITER CONTROL M8330 KK8-E CPU (E) (TIMING GENERATOR) M8331 TA8-E CASSETTE SYSTEM INTERFACE M8335 VT8-E VIDEO DISPLAY TERMINAL (PRINTER/KEYBAORD CONTROL) M8336 VT8-E VIDEO DISPLAY TERMINAL (LINE BUFFER) M8337 VT8-E VIDEO DISPLAY TERMINAL (FREQUENCY DIVIDER BOARD) M8340 KE8-E EXTENDED ARITHMETIC ELEMENT (EAE DECODER AND STEP COUNTER) M8341 KE8-E EXTENDED ARITHMETIC ELEMENT (EAE MULTIPLEXERS AND TIMING CONTROL) M8349 MR8-F 1K PROM M8350 KA8-E POSITIVE I/O BUS INTERFACE M8360 KD8-E DATA BREAK INTERFACE M8410 FPP8-A FLOATING POINT PROCESSOR (CONTROL BOARD) M8411 FPP8-A FLOATING POINT PROCESSOR (DATA PATH) M8417 MS8-C MOS MEMORY (32K) M8655 KL8-JA TERMINAL CONTROL I know of two cards that I don't have on the list, these are the KL8-A, a four line terminal interface on a hex-board, and the RL8A, which is a disk controller for the RL01, also a hex-board. I don't know if the fpp-12 is an omnibus option, and there a surely more cards I don't know about, but it's a beginning... /Johnny --------  Received: from EDDIE.MIT.EDU by MC.LCS.MIT.EDU via Chaosnet; 21 MAY 89 19:49:18 EDT Received: by EDDIE.MIT.EDU with sendmail-5.45/4.7 id ; Sun, 21 May 89 19:49:49 EDT Date: Sun, 21 May 1989 19:49:46 EDT From: Jonathan Alan Solomon To: PDP8-Lovers-Request Cc: PDP8-LOVERS@MC.LCS.MIT.EDU In-Reply-To: Your message of Sun, 21 May 89 19:34:57 EDT Message-Id: I didn't get this mail. please resend it.  Date: Sun, 21 May 89 19:34:57 EDT From: PDP8-Lovers-Request To: PDP8-LOVERS@MC.LCS.MIT.EDU Message-ID: <582238.890521.PDP8@MC.LCS.MIT.EDU> This is a test. Don't respond unless you don't get this mail. Thank you. ---Rob  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 22 May 89 10:51:08 EDT Received: from AEROSPACE.AERO.ORG by mintaka.lcs.mit.edu id aa23810; 22 May 89 10:43 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA19018; Mon, 22 May 89 07:41:53 -0700 Posted-Date: Mon, 22 May 89 07:41:52 -0700 Message-Id: <8905221441.AA19018@aerospace.aero.org> To: wally@aerospace.aero.org Cc: Johnny Billquist , "Christopher R. Zach" , PDP8-LOVERS@mc.lcs.mit.edu, wally@lcs.mit.edu, wally@lcs.mit.edu Subject: Re: MACREL for OS/8... In-Reply-To: Your message of "Fri, 19 May 89 06:47:44 PDT." <8905191347.AA20079@aerospace.aero.org> Date: Mon, 22 May 89 07:41:52 -0700 From: wally@aerospace.aero.org It's Monday morning now. I've managed to get 14 floppies worth of good things for you. I planned to go to the post office today but realized that I still have to get some things copied on the copy machine; such as the Macrel manual. I have your mailing address around somewhere but can't recall exactly where, so give it to me again and I won't have to look for it. I couldn't understand what you meant by Asts (interrupts) not very possible in OS/8. Interrupts to a specified address (vectored interrupts) are dependant on hardware. I believe that DEC had one I/O board which did vectored interrupts. That was to be one of the features of my I/O board. Also, by having buffered input, It is not neccesary to use interrupts to avoid loosing characters. What do you presently do for work? How did you get into 8's? What is a 'x-max box'. What do you do for hobbies besides 8's? Speaking of interrupts - a TTY: type handler useing top of memory if needed (for sure needed) interrupt driven with a ring buffer would make a nice handler for use in file transfer with COPY or EDIT or ... . also would give type ahead. MEM N could be used to prevent it's being overwritten by OS/8 programs. Let me know if you get your FPP. I could possibly find one cheap around here. your friend Wally  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 22 May 89 12:37:20 EDT Received: from AEROSPACE.AERO.ORG by mintaka.lcs.mit.edu id aa09976; 22 May 89 12:30 EDT Received: from localhost by aerospace.aero.org with SMTP (5.61++/6.0.GT) id AA22082; Mon, 22 May 89 09:29:05 -0700 Posted-Date: Mon, 22 May 89 09:29:03 -0700 Message-Id: <8905221629.AA22082@aerospace.aero.org> To: Johnny Billquist Cc: PDP8-LOVERS@mc.lcs.mit.edu, wally@lcs.mit.edu, wally@lcs.mit.edu Subject: sending disks In-Reply-To: Your message of "Fri, 19 May 89 06:47:44 PDT." <8905191347.AA20079@aerospace.aero.org> Date: Mon, 22 May 89 09:29:03 -0700 From: wally@aerospace.aero.org It's Monday morning now. I've managed to get 14 floppies worth of good things for you. I planned to go to the post office today but realized that I still have to get some things copied on the copy machine; such as the Macrel manual. I have your mailing address around somewhere but can't recall exactly where, so give it to me again and I won't have to look for it. I couldn't understand what you meant by Asts (interrupts) not very possible in OS/8. Interrupts to a specified address (vectored interrupts) are dependant on hardware. I believe that DEC had one I/O board which did vectored interrupts. That was to be one of the features of my I/O board. Also, by having buffered input, It is not neccesary to use interrupts to avoid loosing characters. What do you presently do for work? How did you get into 8's? What is a 'x-max box'. What do you do for hobbies besides 8's? Speaking of interrupts - a TTY: type handler useing top of memory if needed (for sure needed) interrupt driven with a ring buffer would make a nice handler for use in file transfer with COPY or EDIT or ... . also would give type ahead. MEM N could be used to prevent it's being overwritten by OS/8 programs. Let me know if you get your FPP. I could possibly find one cheap around here. your friend Wally  Received: from AI.AI.MIT.EDU (CHAOS 3130) by MC.LCS.MIT.EDU 24 May 89 15:24:45 EDT Date: Wed, 24 May 89 15:24:55 EDT From: "Robert E. Seastrom" Subject: UNIX for the eight... To: BQT@KICKI.STACKEN.KTH.SE cc: PDP8-LOVERS@MC.LCS.MIT.EDU In-reply-to: Msg of 24-May-89 17:46:19 +0200 from Johnny Billquist Message-ID: <599741.890524.RS@AI.AI.MIT.EDU> I know that there was a Unix for the PDP-7... I dunno about the 8. I would think that I would have heard about if (if it exists) by now. ---Rob  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 24 May 89 11:59:50 EDT Received: from [130.237.234.220] by mintaka.lcs.mit.edu id aa02152; 24 May 89 11:56 EDT Return-Path: Date: 24-May-89 17:46:19 +0200 From: Johnny Billquist To: PDP8-LOVERS@mc.lcs.mit.edu Subject: UNIX for the eight... Message-ID: <12496598598.22.1113.125400@KICKI.STACKEN.KTH.SE> Now, I'm no fan of unix, but since there exists a UNIX for the eight, I think it would be neat to have... The facts is that a book from 1982 states that there is a UNIX for the pdp8, from AT&T, that is very close to "real" unix, as of 1982. Just to brag about to my friend, if nothing else... Anybody seen this creature? /Johnny --------  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 25 May 89 08:18:00 EDT Received: from venera.isi.edu by mintaka.lcs.mit.edu id aa11968; 25 May 89 8:15 EDT Posted-Date: Thu, 25 May 89 04:13:05 PST Message-Id: <8905251213.AA04679@venera.isi.edu> Received: from LOCALHOST by venera.isi.edu (5.61/5.51) id ; Thu, 25 May 89 05:13:13 -0700 To: Johnny Billquist Cc: "Robert E. Seastrom" , pdp8-lovers@mc.lcs.mit.edu, fucich@venera.isi.edu Subject: Re: UNIX for the eight... In-Reply-To: Your message of 25 May 89 13:36:03 +0200. <12496815182.22.1113.40780@KICKI.STACKEN.KTH.SE> Date: Thu, 25 May 89 04:13:05 PST From: fucich@venera.isi.edu There is LISP for the 8 too.  Received: from AI.AI.MIT.EDU (CHAOS 3130) by MC.LCS.MIT.EDU 25 May 89 10:57:33 EDT Date: Thu, 25 May 89 10:57:23 EDT From: "Robert E. Seastrom" Subject: UNIX for the eight... To: BQT@KICKI.STACKEN.KTH.SE cc: pdp8-lovers@MC.LCS.MIT.EDU, RS%AI.AI.MIT.EDU@MINTAKA.LCS.MIT.EDU In-reply-to: Msg of 25-May-89 13:36:03 +0200 from Johnny Billquist Message-ID: <600025.890525.RS@AI.AI.MIT.EDU> Can you post a reference for this? Better still, can you quote them in context too? ---Rob  Received: from AI.AI.MIT.EDU (CHAOS 3130) by MC.LCS.MIT.EDU 25 May 89 11:00:44 EDT Date: Thu, 25 May 89 11:00:29 EDT From: "Robert E. Seastrom" Subject: UNIX for the eight... To: fucich@VENERA.ISI.EDU cc: BQT@KICKI.STACKEN.KTH.SE, pdp8-lovers@MC.LCS.MIT.EDU, RS%AI.AI.MIT.EDU@MINTAKA.LCS.MIT.EDU In-reply-to: Msg of Thu 25 May 89 04:13:05 PST from fucich at venera.isi.edu Message-ID: <600027.890525.RS@AI.AI.MIT.EDU> > There is a LISP for the 8 too. Yes; until recently you could get it from DECUS (they phased out the paper tape stuff about 4 years ago). It has been said that it is almost trivial to write a LISP interpreter... many people have done it for many different machines. Just so long as you don't need to be compatible with some existing LISP, writing one is not a big deal. Learning to program in LISP, on the other hand... ---Rob  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 25 May 89 07:40:39 EDT Received: from [130.237.234.220] by mintaka.lcs.mit.edu id aa24906; 25 May 89 7:37 EDT Return-Path: References: Message from "Robert E. Seastrom" of 24-May-89 21:49:43 In-reply-to: <599741.890524.RS@AI.AI.MIT.EDU> Date: 25-May-89 13:36:03 +0200 From: Johnny Billquist To: "Robert E. Seastrom" cc: pdp8-lovers@MC.lcs.mit.edu Subject: Re: UNIX for the eight... Message-ID: <12496815182.22.1113.40780@KICKI.STACKEN.KTH.SE> There was a UNIX both for the 7 and the 8 according to those papers... /Johnny --------  Received: from AI.AI.MIT.EDU (CHAOS 3130) by MC.LCS.MIT.EDU 25 May 89 23:36:59 EDT Date: Thu, 25 May 89 23:37:05 EDT From: "Christopher R. Zach" Subject: UNIX for the eight... To: RS%AI.AI.MIT.EDU@MINTAKA.LCS.MIT.EDU cc: BQT@KICKI.STACKEN.KTH.SE, PDP8-LOVERS@MC.LCS.MIT.EDU In-reply-to: Msg of Wed 24 May 89 15:24:55 EDT from Robert E. Seastrom Message-ID: <600351.890525.CZ@AI.AI.MIT.EDU> Unix was developed on the old 7. CZ  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 27 May 89 00:25:11 EDT Received: from uxc.cso.uiuc.edu by mintaka.lcs.mit.edu id aa12385; 27 May 89 0:22 EDT Received: from convex.UUCP by uxc.cso.uiuc.edu with UUCP (5.61+/IDA-1.2.8) id AA16169; Fri, 26 May 89 22:53:31 -0500 Received: by convex (5.51/4.7) id AA04060; Fri, 26 May 89 22:41:38 CDT Received: by concave (5.51/4.7) id AA11498; Fri, 26 May 89 22:41:36 CDT Date: Fri, 26 May 89 22:41:36 CDT From: Anthony Datri Message-Id: <8905270341.AA11498@concave> To: pdp8-lovers@mc.lcs.mit.edu Subject: re: computer engineeing, a DEC view... BTW, the ISBN for that book is 0-932376-00-2. I recommend it enthusiastically. It says that it was composed on a "DEC Word Processing system", and given the 1978 copyright, that probably means an 8/A or a WS78. A PDP-8 in a VT52: what could be more perfect? I tried to convince our engineers that we should use 8's as service processors for our machines instead of 68000's, but they wouldn't go for it:-) Anthony A. Datri, Convex. My employer wouldn't even understand these view, let alone support them:-)  Received: from lcs.mit.edu (CHAOS 15044) by MC.LCS.MIT.EDU 31 May 89 16:57:49 EDT Received: from [130.237.234.220] by mintaka.lcs.mit.edu id aa12702; 31 May 89 16:51 EDT Return-Path: Date: 31-May-89 22:48:46 +0200 From: Johnny Billquist To: pdp8-lovers@mc.lcs.mit.edu Subject: Expansion and memory... Message-ID: <12498488665.31.1113.145460@KICKI.STACKEN.KTH.SE> I have a question for all you initiated omnibus eighters out there. First of all. I have an 8/e, with an 8/a used as an expansion box. I also have a paper, from dec, which tells a little about expansions for the 8/e. The funny thing is, that this paper, specifies that the backplane having the memory (the box with that backplane I mean) ALWAYS should be on top. They make this extremely clear. However, when I put together my current configuration, I hadn't read this paper, and naturally (according to Murphy) I put the 8/e, with all controllers on top, and the 8/a box, with memory below. Now, this works just fins, never had any problems at all, so why does (did) DEC think that one NEVER should do this? Just curious... Johnny --------