Author: FPP-12 Floating Point Processor

L. G. Boxall and R. H. Abel, Colorado State University, Fort Collins, Colorado This FPP-12 simulator can be used to directly replace the floating point software package in any PDP-12 assembler program. Enhanced computational speed (5 to 10 times) and smaller core requirements are realized by the use of the FPP simulator. The simulator will accept all of the instructions used in the PDP-8 floating point systems packages, as well as providing many additional programming features.

Minimum Hardware: PDP-12, FPP-12 Processor

Storage Requirement: 0.7K plus optional routines

Restrictions: Must be located in field 0

Source Language: Assembler-PDP and FPP-12

Catalog: July 1974