Experiment

W. R. Burrus, E. Madden, C. O. McNew, and R. W.

Peelle

Documentation (only) describing an interface constructed to

use a PDP-8 computer with a charged-particle detector

system employing three solid-state detectors and flight-time

analysis. Up to 48 bits from each randomly-occurring event

are transferred through the data (break) channel to a hardware-

selected buffer region in the core of a PDP-8 computer.

Designed for use as a magnetic tape analyzer for the most

complex cases, the system assumes that the 48 bits originate

in flag bits set by fast logic and in (presently four) amplitude

digitizers, all of which are assumed to contain information

for the same event. The system includes some limited capabi-

lity for controlling the course of the experiment, and pro-

vides for read-out through the computer of a series of external

fast counters. The report summarizes the design concepts,

shows schematic flow diagrams, defines the computer in-

structions associated with the interface system, and gives

simple model programs to illustrate methods of applications.