1               /
   2               / Test how long until VC8E "done" is asserted.
   3               / Modified to test *that* done is asserted for
   4               / each instruction that should assert it.
   5               /
   6               DISD=6052       / Skip Done
   7               DILX=6053       / Load X
   8               DILY=6054       / Load Y
   9               DIXY=6055       / Intensify (X, Y)
  10               DILE=6056       / Load Enable
  11               *200
  12               START,
  13 000200  6053          DILX            / Start something (should be a few)
  14 000201  4213          JMS WAIT        / Check for "done" flag
  15 000202  6054          DILY            / Start something (should be a few)
  16 000203  4213          JMS WAIT        / Check for "done" flag
  17 000204  6055          DIXY            / Start something (should be zero!)
  18 000205  4213          JMS WAIT        / Check for "done" flag
  19 000206  6056          DILE            / Start something (should be many)
  20 000207  4213          JMS WAIT        / Check for "done" flag
  21 000210  6031          KSF             / User want attention?
  22 000211  5200          JMP START       / No, go again
  23 000212  5633          JMP I C7600     / Yes, return to OS/8
  24 000213  0000  WAIT,   .-.             / Wait for "done"
  25 000214  7201          CLA IAC         / Set as
  26 000215  3235          DCA COUNT1      / first iteration
  27 000216  6052  LOOP,   DISD            / Done yet?
  28 000217  7410          SKP             / Nope
  29 000220  5223          JMP DONE
  30 000221  2235          ISZ COUNT1      / Count a "not done" iteration
  31 000222  5216          JMP LOOP        / and try again
  32               / Two cases: DISD skipped, or counter overflowed.
  33 000223  1235  DONE,   TAD COUNT1      / Get how many iterations
  34 000224  7640          SZA CLA         / Non-zero is OK
  35 000225  5613          JMP I WAIT      / Return to user
  36 000226  7344          CLA CLL CMA RAL / Get -2
  37 000227  1213          TAD WAIT        / Get addr of failing instruction
  38 000230  3213          DCA WAIT        / Get addr of failing instruction
  39 000231  1613          TAD I WAIT      / Get the failing instruction
  40 000232  7402          HLT             / into ac, then halt
  41 000233  7600  C7600,  7600 CLA        / Resume with AC clear
  42 000234  5613          JMP I WAIT      / Do over!
  43 000235  0000  COUNT1, .-.
  44               $

C7600   0233
COUNT1  0235
DILE    6056
DILX    6053
DILY    6054
DISD    6052
DIXY    6055
DONE    0223
LOOP    0216
START   0200
WAIT    0213