; M307 PCB REV B, SCHEMATIC REV C DUAL INTEGRATING ONE SHOT. ; ; USE SINGLE STEP + OSCILLOSCOPE TO MEASURE PULSES. ; TEST OUTPUT PIN BV1/BV2 IS HIGH WHEN PULSE A/PULSE B IS EXPECTED. ; ; ISOLATE UUT AB2 FROM TESTER, ; CONNECT UUT AB2 TO -15V (POWER SUPPLY 3RD PIN NEXT TO KEY) ; SHORT AA1 TO AC1 (CONNECTS POT TO C) (SECTION A) ; SHORT AV1 TO AP1 (CONNECTS POT TO C) (SECTION B) ; SWITCH 1 AND SWITCH 2 SELECTS CAP (PULSE RANGE) ; POS 5 5 USEC TO 50 USEC ; POS 4 50 USEC TO 500 USEC ; POS 3 500 USEC TO 5 MSEC ; POS 2 5 MSEC TO 50 MSEC ; POS 1 50 MSEC TO 500 MSEC PINS 1 I AR1 ENABLE (LOW DISABLES BOTH SECTION A AND SECTION B) 2 I AL1 ENABLE-A (LOW DISABLES SECTION A) 3 I AJ2 TRIGGER A1, TRIGGER IS ((A1 & (A2-N | A3-N)) & ENABLE & ENABLE-A) 4 I AK2 TRIGGER A2, TRIGGER IS ((A1 & (A2-N | A3-N)) & ENABLE & ENABLE-A) 5 I AL2 TRIGGER A3, TRIGGER IS ((A1 & (A2-N | A3-N)) & ENABLE & ENABLE-A) 6 O AK1 OUTPUT A 7 O AE2 OUTPUT A-N 8 I BV1 TEST OUTPUT- PULSE A EXPECTED 9 I AM1 ENABLE-B (LOW DISABLES SECTION B) 10 I AN1 TRIGGER B1, TRIGGER IS ((B1 & (B2-N | B3-N)) & ENABLE & ENABLE-B) 11 I AS1 TRIGGER B2, TRIGGER IS ((B1 & (B2-N | B3-N)) & ENABLE & ENABLE-B) 12 I AU1 TRIGGER B3, TRIGGER IS ((B1 & (B2-N | B3-N)) & ENABLE & ENABLE-B) 13 O AH2 OUTPUT B 14 O AF2 OUTPUT B-N 15 I BV2 TEST OUTPUT- PULSE B EXPECTED IIIIIOOIIIIIOOI 110110101011010 ; PULSE OUTPUT A (PULSE MAY BE TOO QUICK TO SEE) 1 0 XX1 0 1 0XX1 0 1 0 0 1 XX1 0 0 1 0 1 XX1 0 0 0 1 XX1 0 0 ; TEST DISABLES (SECTION A) 0 1 0 0 1 XX1 0 0 1 XX1 0 0 1 1 ; PULSE OUTPUT B (PULSE MAY BE TOO QUICK TO SEE) 1 0 XX1 0 1 0XX1 0 1 0 0 1 XX1 0 0 1 0 1 XX1 0 0 0 1 XX1 0 0 ; TEST DISABLES (SECTION B) 0 1 0 0 1 XX1 0 0 1 XX1 0 0 1 1 ; NO CHANGE 110110101011010 END